臺灣博碩士論文加值系統

本論文我們使用無米勒電容補償模型並運用前饋級電路來獲得高增益與高頻率特性。我們使用共模回授電路去調整共模輸出位準與偏壓電流。此共模回授電路能使輸出的準位更精確的在參考電壓。
在本研究中使用 TSMC 0.35μm CMOS製程製作晶片。電壓增益大約在90dB，頻率大約在1GHz，供應電壓為±1.25V。電壓輸出位置小於10mV以內。

In this thesis, we use the no-capacitor feed-forward (NCFF) compensation scheme which employs a feed-forward path to obtain high gain, high frequency. We use CMFB circuit to adjust the common-mode output voltages and the bias circuit. The CMFB circuit makes the output accurately to the reference voltage.
The circuit was designed and fabricated TSMC 0.35 μm CMOS process. The dc gain is around 90dB and the cut-off frequency is 1GHz. The supply voltage is ±1.25V. The output voltage is smaller than 10mV.

Chapter 1 Introduction……………………………………………………………………1
1.1 Background……………………………………………………………………1
1.2 Motivation……………………………………………………………………3
1.3 Thesis Organization…………………………………………………………4

Chapter 2 Previous NCFF Compensation Scheme and CMFB Design …………………5
2.1 High Frequency Compensation Scheme………………………………………5
2.2 The NCFF Compensation Scheme Method……………………………………8
2.3 Previous Common Mode Feedback Circuit…………………………………9

Chapter 3 The Proposed High Gain High Frequency OTA Scheme……………………13
3.1 The Structure of Proposed High Gain High Frequency OTA…………………13
3.1.1 The Block Diagram of Basic Scheme OTA……………………………13
3.1.2 The Open Loop DC Gain………………………………………………14


3.2 The Common Mode Feedback Circuit Design………………………………16
3.2.1 The CMFB Circuit for Vo1 and Vo2……………………………………16
3.2.2 Vb1 and Vb2 Bias Circuit………………………………………………18
3.3 The Bias Circuit for Vb3………………………………………………………20
3.4 The CMFB Circuit for Vout1 and Vout2…………………………………………22
3.5 The Completely Structure of Proposed OTA Circuit…………………………23
3.5.1 The Completely Component Values of Proposed OTA Circuit……………………24

Chapter 4 Simulation and Measurement Result…………………………………………26
4.1 Simulation Result……………………………………………………26
4.1.1 OTA Frequency Response Comparison………………………………26
4.1.2 OTA DC Bias Comparison………………………28
4.2 Measurement Result and Layout……………………………………………29
4.2.1 Chip Features and Layout……………………………………………29
4.2.2 Measurement Result…………………………………………………31

Chapter 5 Conclusion……………………………………………………………………34
References………………………………………………………………………………35

[1] K. Bult, J.G.M. Geelen “A fast settling CMOS OpAmpfor SC circuits with 90dB DC gain” IEEE Journal of Solid-State Circuits, vol. 25, pp. 1379-1384. Dec. 1990.
[2] J. Silva-Martinez, F. Carreto-Castro “Improving the High-Frequency Response
of the Folded-Cascode Amplifiers” IEEE International Symposium on Circuits and Systems
, vol. 1, pp. 500-503, May. 1996.
[3] B.K. Thandris, J. Silva-Martinez, F. Maloberti “A Feedforward Compensation Scheme for High Gain Wideband amplifiers” IEEE International Conference on Electronics, Circuits and Systems, vol. 3, pp. 1115-1118, Sept. 2001.
[4] M.M. Ahmadi “A Novel Modelling and Optimisation of Gain-Boosted Cascode Amplifiers for High Speed Applications” IEEE International Conference on Electronics, Circuits and Systems, vol. 2, pp. 683-686, Dec. 2003.
[5] J. Silva-Martinez, J. Adut, M. Rocha-Perez “A 58dB SNR 61th Order Broadband 10.7 MHz SC Ladder Filter” IEEE Conference on Custom Integrated Circuits, pp. 13-16 , Sept. 2003.
[6] B.K. Thandri, J. Silva-Martinez “A Robust Feedforward Compensation Scheme For Multi-Stage Operational Transconductance Amplifiers with No Miller Capacitors” IEEE Journal of Solid-State Circuits, vol. 38, pp 237-243, Feb. 2003.
[7] B. K. Thandri, J. Silva-Martinez, M. J. Rocha-Perez, and J. Wang “A 92MHz, 80dB Peak SNR SC Bandpass Data-Sigma Modulator Based on a High GBW OTA with No Miller Capacitors in 0.35um CMOS technology” IEEE Conference on Custom Integrated Circuits
, pp. 123-126, Sep. 2003.
[8] G. Olvera-Romero, J. Silva-Martinez “A folded-cascode OTA for high-frequency applications based on complementary differential pairs” IEEE International Workshop on Mixed-Mode Integrated Circuits and Applications, pp. 57-60, July 1999.
[9] B.K. Thandri, J. Silva-Martinez “An Overview of Feed-Forward Design Techniques for High-Gain Wideband Operational Transconductance Amplifiers” Microelectronics Journal, vol. 37, pp 1018-1029, April 2006.
[10] B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill,
pp. 314-321, 2005.
[11] R.J. Baker, COMS Circuit Design, Layout, and Simulation, Wiley-Interscience, pp.836-837, 2005.