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研究生:吳俊義
研究生(外文):Chun-Yi Wu
論文名稱:注入鎖定除頻器及壓控震盪器之設計與實作
論文名稱(外文):Design and Implementation of Injection-Locked Frequency Divider and Voltage-Controlled-Oscillators
指導教授:莊敏宏張勝良
指導教授(外文):Miin-Horng JuangSheng-Lyang Jang
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:96
語文別:英文
論文頁數:122
中文關鍵詞:注入鎖定除頻器壓控震盪器
外文關鍵詞:Injection-Locked Frequency DividerVoltage-Controlled-Oscillator
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本論文主要描述二個以變壓器耦合為基礎之電路架構,其分別為“低功率壓控震盪器”以及“新式哈特萊3-D電感注入鎖定除頻器”。此二電路皆採用臺積電所提供之零點一八微米互補式金氧半製程所製造。其中新式低功率壓控震盪器在採用變壓器耦合技巧後,其電路工作於1.2V之外加供應電壓下其輸出之相位雜訊在距離5.6GHz載波頻率1MHz處所量測之結果達-119.13dBc/Hz且其直流消耗功率2.4mW;在控制電壓由0V調至1.2V時,其調諧範圍為600MHz並且計算出來的FOM是-190.29。第二個電路採用3-D電感變壓器耦合之技巧,可達到節省面積之要求,此除頻器工作於1.2V之外加供應電壓下的自由震盪頻率為2.41GHz,在注入信號為0dBm時,該除頻器即可鎖定由4.39GHz至5.83GHz之輸入信號範圍,換言之,該除頻器具有1.44GHz (28.18%)之鎖定範圍。
This thesis mainly presents two circuit used the transformer coupling technique. A 5.6GHz low power balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.18 μm CMOS 1P6M process. The designed circuit topology consists of two single-ended complementary Colpitts LC-tank VCOs configured in a balanced topology. At the supply voltage of 1.2 V, the output phase noise of the VCO is -119.13dBc/Hz at 1MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.29dBc/Hz. Total VCO core power consumption is 2.4 mW. Tuning range is about 600 MHz, from 5.36 to 5.96 GHz, while the control voltage was tuned from 0 V to 1.2 V.
A low-power injection locked frequency divider (ILFD) based on the all-NMOS Hartley VCO topology. The ILFD uses 3-D transformer to form the resonator and save chip area. At the supply voltage of 1.2 V, the tuning range of the free running ILFD is from 2.32 GHz to 2.65 GHz, about 330 MHz while the tuning voltage is tuned from 0 to 1.8 V. At the injection signal power of 0dBm, the total locking range of the ILFD in the divide-by-2 mode is from 4.39 to 5.83 GHz, about 1.44 GHz. The total locking range of the ILFD in the 4 mode is from 9.18 to 10.4 GHz, about 1.22 GHz. The ILFD dissipates 3.42 mW at the supply voltage of 1.2 V and was fabricated in the 1P6M 0.18 μm CMOS process. The phase noise of the locked ILFD tracks with the low-phase-noise injection source.
中文摘要 I
Abstract II
誌謝 III
List of Figures VI
List of Tables X
Chapter One Introduction 1
1.1 BACKGROUND 1
1.2 THESIS ORGANIZATION 4
Chapter Two Design of Voltage Controlled Oscillators 5
2.1 INTRODUCTION 5
2.2 THE OSCILLATOR THEORY 6
2.3 QUATALITY FACTOR 9
2.4 SORTS OF OSCILLATORS 11
2.4.1 RESONATORLESS OSCILLATORS 12
2.4.2 LC-TANK OSCILLATORS 14
2.5 CMOS CORE CROSS-COUPLED DIFFERENTIAL TOPOLOGY 22
2.6 MAKING THE OSCILLATOR TUNABLE 25
2.7 QUADRATURE OSCILLATOR 27
Chapter Three The Parameters of VCO 32
3.1 INTRODUCTION 32
3.2 THE IMPORTANT PARAMETERS OF VCO 32
3.3 VARACTORS 43
3.3.1 JUNCTION VARACTORS 43
3.3.2 MOS VARACTORS 43
3.4 INDUCTOR AND TRANSFORMERS 46
3.4.1 SPIRAL GEOMETRY 47
3.4.2 INDUCTANCE 48
3.4.3 SPIRAL INDUCTOR ELECTRICAL MODELS 49
3.4.4 PHYSICAL OVERVIEW 52
3.4.5 PARASITIC EFFECTS IN THE SUBSTRATE 55
3.4.6. TRANSFORMER 59
3.5. RESISTORS 67
3.6. NOISE 68
3.6.1 THERMAL NOISE 69
3.6.2 FLICKER NOISE 70
3.6.3 PHASE NOISE 71
Chapter Four A Low Power 3-D Transformer Hartley Injection-Locked Frequency Divider 75
4.1 INTRODUCTION 75
4.2 CLASSICAL INJECTION-LOCKED CIRCUIT DESIGN 76
4.3 PROPOSED INJECTION-LOCKED CIRCUIT DESIGN 79
4.4 MEASUREMENT RESULTS 81
Chapter Five Low-Power CMOS Differential VCOs 90
5.1 INTRODUCTION 90
5.2 A LOW POWER CMOS BALANCED VCO 91
5.2.1 THE ADVANTAGE OF TRANSFORMER-BASED LC-TANK VCOS 91
5.2.2 PROPOSED LOW POWER BALANCED VCO 92
5.2.3 MEASUREMENT RESULTS 94
5.3 A LOW-VOLTAGE CROSS-COUPLED VCO 99
5.3.1 TRADITIONAL NEGATIVE-GM VCO TOPOLOGY 99
5.3.2 PROPOSED LOW VOLTAGE CROSS-COUPLED VCO 100
5.3.3 MEASUREMENT RESULTS 101
5.4 COMPARISON OF TWO PROPOSED VCOS 105
Chapter Six Conclusion 106
References 108
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