本論文以數值模擬方法討論使用NA1.3、193nm光源之浸潤式系統從事32nm半導體製程的可行性並嘗試延長此系統的壽命。我們使用自由開放軟體SPLAT來模擬計算其製程窗口並提供部分代表性圖案的OPC規則。在未使用解像度增進技術下，10%誤差之製程窗口為0.044(μm) x 4.088(%)，15%誤差之製程窗口則為0.054(μm) x 6.804(%)。我們發現以此系統從事32nm製程會使得OPC規則相當複雜，並建議兩條平行線之最小間隔為74nm。因此更高的NA系統將有助於達到真實half pitch為32nm。

This thesis discusses the feasibility of 32 nm node with 1.3 NA and 193 nm light source immersion lithography system and tries to extend the lifetime of the system. We present the process window and some typical OPC rules by numerical simulation with open software SPLAT. Without any resolution enhancement technologies (RETs), the 10% variation process window is 44 nm × 4.09% and the 15% variation process window is 54 nm × 6.80%. We find that OPC rules for 32 nm node with the system is extremely tedious and suggest that the minimum spacing between two parallel lines is 74 nm. Therefore, higher NA system will be helpful to achieve real 32 nm half pitch.

目 次
摘　　要.......................................................................................................................... iv
Abstract........................................................................................................................... v
誌　　謝. ....................................................................................................................... vi
目 次............................................................................................................................. vii
表目錄.............................................................................................................................. ix
圖目錄............................................................................................................................... x
第一章 緒論..................................................................................................................... 1
1.1 研究動機與目的............................................................................................... 1
1.2 論文架構........................................................................................................... 3
第二章 光學微影............................................................................................................. 4
2.1. 介紹光學微影............................................................................................ 4
2.2. 提高解析度方法........................................................................................ 5
2.2.1. 降低曝光波長................................................................................. 5
2.2.2. 浸潤式微影........................................................................................... 5
2.2.3. 解像度增進技術............................................................................. 6
2.2.3.1. 偏軸照射(OAI, Off-Axis Illumination)………………….. 8
2.2.3.2. 相位移光罩(PSM, Phase Shifting Mask )………………… 9
2.2.3.3. 光學鄰近效應修正(OPC, Optical Proximity Correction) 9
第三章 SPLAT.............................................................................................................. 11
3.1. 介紹SPLAT................................................................................................... 11
3.2. 本論文模擬流程............................................................................................. 11
第四章 製程窗口........................................................................................................... 12
4.1. 成像光強度..................................................................................................... 12
4.2. 曝光寬忍度EL.............................................................................................. 14
4.3. 聚焦深度(DOF, Depth Of Focus) .......................................................... 16
4.4. 不同偏軸照射下32奈米製程製程窗口....................................................... 17
第五章 32奈米製程常見圖案OPC規則.................................................................... 20
5.1. 規則一、獨立線............................................................................................. 20
5.2. 規則二、兩平行線......................................................................................... 23
5.3. 規則三、斷線型兩相鄰線............................................................................. 26
5.4. 規則四、T型相鄰線..................................................................................... 29
5.5. 規則五、T 型線............................................................................................. 32
5.6. 規則六、L 型線相鄰線................................................................................ 35
5.7. 規則七、L 型線............................................................................................. 38
5.8. 規則八、十字線............................................................................................. 41
第六章 總結與未來展望............................................................................................... 45
6.1. 總結................................................................................................................. 45
6.2. 未來展望......................................................................................................... 45
參考文獻......................................................................................................................... 46

[1] 龍文安,半導體微影技術,五南圖書出版公司,中華民國,台北市,2004.
[2] 龍文安,半導體奈米技術,五南圖書出版公司,中華民國,台北市,2006.
[3] E. Robert, P. Thony, K. Lucas, D. Henry, B. Kasprowicz, W. Conley, W. Wu, and L. Litt, “Strategies of optical proximity correction dedicated to chromeless phase lithography for 65 and 45 nm node,＂ in Optical Microlithography XVIII, B. W. Smith, ed., Proc. SPIE 5754, 476-487(2004).
[4] 半導體微影技術動向
http://www.itis.org.tw/rptDetailFree.screen?rptidno=0F0B7E8791C70C1A48257209002AB1EC
[5] Intel：2011年前EUV無法在22nm大展拳腳-電子元器件-新品快播網
http://www.ec.npicp.com/info-detail/22-542-49551844.html
[6] 台積電32奈米新製程可支援類比與數位電路
http://www.hope.com.tw/News/ShowNews.asp?O=200712131719329612&F=Nikon
[7] M. Kling, K. Lucas, A. Reich, B. Roman, H. Chuang, P. Giber, W. Grobman, E. Travis, P. Tsu, T. Vuong, and J. West, “0.25um logic manufacturability using practical 2-D optical proximity correction,＂in Proc. SPIE, vol. 3334, 1998, pp. 204-214.
[8] O. W. Otto, J. G. Garofalo, K. K. Low, C.-M. Yuan, R. C. Henderson, C. Pier-rat, R. L. Kostelak, S. Vaidya, and P. K. Vasudev,“ Automated optical proximity correction：A rule-based approach,＂in Proc. SPIE, vol. 2197, 1994, pp. 278-293.
[9] S. Peng, R. H. French, W. Qiu, R. C. Wheland, M. Yang, M. F. Lemon, and M. K. Crawford, “Second generation fluids for 193 nm immersion lithography,＂in Optical Microlithography XVIII, B. W. Smith, ed., Proc. SPIE 5754, pp. 457-434 (May 2004).
[10] J. H. Burnett, S. G. Kaplan, E. L. Shirley, D. Horowitz, W. Clauss, A. Grenville, and C. V. Peski, “High-index optical materials for 193 nm immersion lithoghraphy,＂in Optical Microlithography XIX, D. G. Flagello, ed., Proc SPIE 6154, 615-418 (Mar, 2006).
[11] M. Dusa, B. Arnold, A. Fumar-Pici, “Prospects and initial exploratory results for double exposure/double pitch technique,＂in Semiconductor Manufacturing, 2005, IEEE International Symposium on, pp. 177-180 (Sep. 2005).
[12] A. K. Wong, Resolution Enhancement Techniques in Optical lithography, SPIE Press, Bellingham, Washington, USA, pp.101-105(2001).
[13] Splat Version 6.0 User Guide,
http://cuervo.eecs.berkeley.edu/Volcano/docs/splat/index.htm.
[14] Max Born and Emil Wolf, Principles of optics: electromagnetic theory of propagation, interference, and diffraction of light, 7th (expanded) edition, (Cambridge University Press, New York, 1999).
[15] Alfred Kwok –Kit Wong, Resolution Enhancement Techniques in optical Lithography, Tutorial Texts in Optical Engineering, Vol TT47. (SPIE Press, Bellingham, Washington, 2001).
[16] 光微影術(Optical Lithography),NCHC奈米科學研究小組,蘇俊鐘
http://nano.nchc.org.tw/dictionary/Optical_Lithography.html
[17] Wu, Q., New developments and opportunities in photolithograpy in 2006, www.sichinamag.com/Campaign/Lithography_sec/download/wuqiang-HHNEC.pdf
[18] Dusa, M., Arnold B., and Fumar-Pici A., Prospects and initial exploratory results for double exposure/double pitch technique, in Semiconductor Manufacturing, 2005, IEEE International Symposium on, pp. 177-180 (Sep. 2005).
[19] Burnett J. H., Kaplan S. G.,Shirley E. L., Horowitz D., Clauss W., Grenville A., and Peski C. V., High-index optical materials for 193 nm immersion lithography, in Optical Microlithography XIX, Flagello D. G., ed., Proc SPIE 6154, 615418 (Mar. 2006).
[20] KimE. J., Chang W., Park J. B., Kim S. J., Kim J. S., and Oh H.-K., EUV lithography simulation for 32 nm node, in Emerging Lithographic technologies X, Lercel M. J., ed., Proc. SPIE 6151, 61510V (Mar. 23, 2006).
[21] Wong, Alfred K.-K., Resolution Enhancement Techniques in optical Lithography, Tutorial Texts in Optical Engineering, Vol. TT47 (SPIE Press, Bellingham, Washington, 2001).