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研究生(外文):Jiyin-Chang Jiang
論文名稱(外文):LTPS-TFT Digital Cell Library Apply 2D-to-3D Conversion System for Three-dimensional Video
外文關鍵詞:LTPSThree-Dimensional Stereo ImageAutostereoscopic display
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LTPS TFT(低溫多晶石薄膜電晶體)LCD為目前顯示器發展的重點之一,相較於 a-Si TFT(非晶矽薄膜電晶體),LTPS TFT的電晶體電子移動速度較非晶矽提高大約百倍,具顯示畫面反映速度快,高亮度、及高解析度,低成本等優點。
採用LTPS TFT製程,更可以把面板週邊的數位電路整合進面板,達成SOP(System On Panel)進而降低成本,提高良率。但是目前為止,由於缺少Cell Library,LTPS TFT的數位電路皆採用Full Custom Design,如果能建立一套完整的LTPS TFT標準元件庫(Cell Library),則面板電路的數位部分便可走Cell-Based Design Flow,可以大大縮短數位電路的設計時間、降低設計成本、電路容易驗證及修改、電路容易改變製程等。
為了實現Cell Base LTPS TFT Circuit Design的願景,以LTPS TFT Cell Library的建立與驗證為主要目標,並且以現在2D照片或是影片做為訊號,利用映像點對映像點排列方式產生多視角的影像來源,這種方式以仿真的原理產生出3D立體影像,供裸眼式3D顯示器來使用播放,實現2D對3D視訊的轉換器,本部分最大的貢獻在於,可將目前九張不同位置的影像輸入到這顆轉換器中,完全不需要任的深度影像資訊,即可隨時觀看到3D立體視訊。
In order to build a circuit on panel, people tend to use special device materials such as Low Temperature Poly Silicon (LTPS)-TFT for various types of circuits on LCD panels. However, due to the substantial deviation on the device characteristics, most of the LTPS-TFT designs are still based on full-custom design style and therefore may waste much human resource and lead to a long turn-around time. In order to achieve a robust and repeatable LCD circuit design flow, we propose to construct a LTPS-TFT cell library for digital circuit designs.
The video devices execute in autostereoscopic 3D display today. This paper describes 2D-to 3D conversion system of chip which doesn’t need depth information.
It exercises with 3um 1P2M technology by LTPS TFT standard cell-base VLSI design flow for controller circuit and TSMC 0.18um 1P6M technology standard cell-based VLSI design flow for 2D/3D conversion system without depth information.
中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vi
圖目錄 vii
第一章 Introduction 1
1.1 Introduction 1
1.1.1 LTPS-TFT LCD 1
1.1.2 3D display 2
1.2 Thesis organization 7
第二章 Overview of LTPS-TFT LCD and 3D display 8
2.1 Overview of LTPS-TFT LCD 8
2.2 Overview of 3D display 9
第三章 Purposed method 13
3.1 LTPS-TFT Cell-based flow 13
3.1.1 Initial design and layout analysis 14
3.1.2 Generation standard cell simulation and GDSII 16
3.1.3 LTPS TFT cell library 19 LTPS TFT cell library with Synopsys Design Compiler 20 Generated LTPS TFT database with Synopsys Astro 20
3.2 2D-to-3D conversion system without depth mapping information 25
第四章 Architecture design of local 2D-to-3D conversion system 31
4.1 Memory mapping scheme for 2D-to-3D conversion system 31
4.2 Date flow 34
4.3 External memory solution for 2D-to-3D conversion system 36
4.3.1 Input system 36
4.3.2 Pixel register 36
4.3.3 Controlled circuit 37
第五章 Experimental results 41
5.1 Simulate method 41
5.2 Subjective analysis 45
5.3 LTPS analysis 48
第六章 Chip implementation 52
6.1 Design flow 52
6.1.1 Cell-based VLSI design flow with TSMC 0.18μm 1P6M process 52 Architecture Design, Verilog RTL design 52 Logic synthesis and optimization 53 DFT consideration 53 Design and timing setup, floorplanning,
placement, CTS, routing and
design for manufacturing 54 Layout verification 55 Post layout simulation, timing verification 55 Verification 55 IC testing 56
6.1.2 Cell-based design flow with LTPS 3μm 1P2M process 56
6.2 Implementation 57
6.2.1 Chip with TSMC 0.18μm 1P6M process 57
6.2.2 Chip with LTPS 3μm 1P2M process 57
6.3 LTPS-TFT chip 59
6.4 Summary 62
第七章 Conclusion 64
參考文獻 66
A 發表論文 70
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