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研究生:李皇佳
研究生(外文):Huang Chia Lee
論文名稱:單/雙層氮化矽感測膜於離子感測光定址電位感測器及電解質溶液-絕緣層-半導體型電容感測器之特性研究
論文名稱(外文):Characterization of the ion-sensitive LAPS and EIS capacitance sensor with Single and Stacked Si3N4 Sensing membranes
指導教授:賴朝松吳旻憲
指導教授(外文):C. S. LaiM. H. Wu
學位類別:碩士
校院名稱:長庚大學
系所名稱:光電工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
論文頁數:65
中文關鍵詞:EIS capacitive sensorLAPSHysteresisSi3N4
外文關鍵詞:電解液-絕緣層-半導體電容感測器光定址電位感測器遲滯氮化矽
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電解液-絕緣層-半導體電容感測器 (EIS capacitive sensor) 是結構、製程最簡單的半導體化學感測器,也在離子感測場效電晶體 (ISFETs) 與光定址電位感測器 (LAPS)是很重要的部份,這類半導體化學感測器被廣泛運用在食品工業、製程的控制及環境監控上。它具備優於傳統電極的優點,像是所需樣品量少、快速的反應時間和與半導體製程的整合性,使得涼測成本下降。特別LAPS的感測區域是平坦的,可與微流體生物晶片(μTAS)結合且感測區域由激發光照射的位置所決定,亦可進行多離子感測和化學影像分析。
為了結合LAPS與微流體晶片,需要使參考電極微縮化且減少非理想量測效應,可以使用參考場效電晶體的概念,甚至簡化為參考光定址電位感測器。為了實現參考光定址電位感測器,先從原理及實驗上和EIS capacitive sensor進行驗證,單層氮化矽 (Si3N4) 和雙層氮化矽/二氧化矽 (Si3N4/SiO2) 之感測膜結構分別被應用於EIS capacitive sensor與LAPS上,在EIS capacitive sensor方面得到29.8 mV/pH的感測度差異,在LAPS方面則是得到7.5 mV/pH在pH值介於2到6,24.9 mV/pH在pH值介於8到12的感測度差異。
為了了解為何單雙層氮化矽會有如此差異,對於單層氮化矽 (Si3N4) 和雙層氮化矽/二氧化矽 (Si3N4/SiO2) 之結構進行遲滯 (Hysteresis) 量測,發現遲滯只在單層結構較明顯並影響感測度,為了解釋這個現象,對氮化矽單層結構的感測度不同提出缺陷電荷假設並由實驗得到證實。
除此之外,利用聚二甲基矽氧烷 (PDMS) 材料將感測器系統與流體感測系統相結合,做了抗化性實驗證明可行,藉由雷射二極體提升入射光功率與侷限波寬以改善表面光伏特性,使用光纖準確控制照光角度與面積,改善LAPS信號。
Electrolyte-Insulator-Semiconductor (EIS) capacitive sensor is the simplest chemical sensor based on semiconductor for structure and process. It is very important to Ion-Selective Field-Effect transistors (ISFETs) and Light-addressable potentiometric sensor (LAPS). This kind of semiconductor chemistry sensor has been used to detect the concentration of different ions for food industry, process control and environmental safety. It has good advantages over traditional ion electrode, such as small volume sample, short response time and high compatibility of CMOS technology. It will be cost down by the advantages. The sensing area on the LAPS is flat and defined by illumination. It compatible with micro-Total Analysis System (μTAS), multi-ion sensing and chemical imaging sensor.
For combining LAPS andμTAS, Reference Field Effect Transistor (REFET) could be an alternative method to minimize the reference glass electrode and to reduce the non-ideal measurement effect. If use RELAPE, we can use only common platinum pseudo reference electrode. In order to achieve RELAPS, the sensitivity of single Si3N4 and stacked Si3N4/SiO2 structures were applied to LAPS and EIS capacitive sensor in theory and experiment. The differential sensitivity of the EIS structure was 29.8 mV/pH. However, the differential responses of LAPS were performed to two slopes. The sensitivity in the acidic solutions (from pH 2 to pH 6) was 7.5 mV/pH, but the sensitivity was 24.9 mV/pH in the basic solutions (from pH 8 to pH 12).
In order to understand why there is such a difference, hysteresis was only found and affected the sensitivity in single EIS structure. To explain this phenomenon, in particular decrease of sensitivity of sensitivity of single-layer EIS structure proposes an effect of defect charge in the Si3N4 layer.
In addition, using polydimethylsiloxane (PDMS) combine LAPS and fluid-sensing systems. An anti-chemical experiment proved to be feasible. To improve the surface photovoltaic properties, using laser diode to enhance the power and limitations of the incident light wave width. To increase the signal of LAPS, adding fiber accurately control the angle and size of incident light.
誌謝 i
摘要 ii
Abstract iv
Contents vi
Figure Captions and Tables viii
Chapter 1 Introduction………………………………………………...1
1.1 Surface Potential Sensor………………………...…...…1
1.2 Reference Light-Addressable Potentiometric Sensor…..1
1.3 Traps cause hysteresis effect……………………..….….2
1.4 Optical System and fluidic channel LAPS system….…..3
1.5 The Motivation of This Work…………………………...3
1.6 Organization of This Thesis…………………………….4
Chapter 2 Comparison of single and stacked Si3N4 sensing membranes on EIS structure and LAPS………………………..………7
2.1 Introduction…………………………………………….7
2.1.1 Site Dissociation Theory………………………..…7
2.1.2 Theory of EIS Structure…………….…………..…11
2.1.3 Theory of LAPS………...……………..………..…12
2.2 Experimental…….……………………………………..14
2.3 Result and discussion……………………..…………...15
2.4 Summary………………………………………………15
Chapter 3 Applications of Differential pH Sensors by Hysteresis Effect on the Traps of Si3N4 Sensing Membranes 26
3.1 Introduction……………………………………………26
3.2 Experimental…………………………………………...27
3.3 Measurement setup…………………………………….27
3.4 Results and Discussion………………………………...29
Chapter 4 Integration of Optical system for LAPS and Fluidic Channel by PDMS encapsulation 37
4.1 Introduction…………………………………………….37
4.2 Experimental…………………………………………...37
4.2.1 PDMS………………………………..…………. 37
4.2.2 LASER diode………………………………….....38
4.3 Results and Discussion………………………………...38
4.4 Summary……………………………………………….39
Chapter 5 Conclusions and Future work 45
5.1Conclusions…………………………………………….45
5.2 Future work…………………………………………….45
Reference 46
Fig. 1-1 The schematic cross section of the EIS capacitive sensor.
Fig. 1-2 The schematic cross section of the LAPS.
Fig. 1-3 The schematic cross section of the ISFET/REFET pair.
Fig. 1-4 The schematic cross section of the LAPS/RELAPS pair.

Fig. 2-1 Schematic representation of the site binding model
Fig. 2-2 Typical C-V curves for electrolyte-SiO2-Si EIS structure [7]
Fig. 2-3 Schematic of a LAPS device and circuit components [7]
Fig. 2-4 The physical principles of LAPS operation [7].
Fig. 2-5(a) Transient photocurrents in the LAPS
Fig. 2-5(b) Continuous photocurrents in the LAPS
Fig. 2-6(a) Picture for LAPS measurement
Fig. 2-6(b) Picture for sensing chip
Fig. 2-6(c) Another picture for LAPS measurement
Fig. 2-7 The fabrication process flow for Si3N4 LAPS
Fig. 2-8 Process flow of control programmed by LABview
Fig. 2-9 The schematic cross section of the LAPS structure
Table 2-1 Summary of the sensing properties for single layer, stacked layer, and the differential response of EIS structures and LAPS

Fig. 3-1 Schematic of (a) stacked and (b) single layer EIS structure
Fig. 3-2 Hysteresis of (a) stacked and (b) single layer EIS structure in buffer solution of pH 4
Fig. 3-3 C-V curves of single Si3N4 EIS structure with bias (a) from acc. to inv. and (b) from inv. to acc. in buffer solution.
Fig. 3-4 C-V curves of stacked Si3N4/SiO2 EIS structure
Fig. 3-5 Schematic energy band diagram of Si3N4 / p-Si stack containing defects in the Si3N4 layer (b) at flat band condition. (a) For 5 V substrate bias, the defects filled as soon as holes are injected in the Si substrate (c) for 1 V substrate bias, the defects were discharged (uncharged state).
Table 3-1 Summary of the sensing properties for different direction sweep bias in stacked and single EIS structures
Table 3-2 Summary of the 1 kHz hysteresis width for single EIS structure in different buffer solution
Table 3-3 Summary of the sensing properties for different direction sweep bias direction and range in single EIS structure
Fig. 3-6 C-V curves of single Si3N4 EIS structure with different bias direction (from inv. to acc.) and bias range (2V~4V, 1V~5V, 0V~6V)
Fig. 3-7 C-V curves of single Si3N4 EIS structure with different bias direction (from acc. to inv.) and bias range (4V~2V, 5V~1V, 6V~0V)
Fig. 3-8 C-V curves (pH4, pH8, pH12) of single Si3N4 EIS structure with different bias direction (from acc. to inv.) and bias range (4V~2V, 5V~1V, 6V~0V)
Fig. 3-9 C-V curves (pH4, pH8, pH12) of single Si3N4 EIS structure with different bias direction (from inv. to acc.) and bias range (2V~4V, 1V~5V, 0V~6V)
Fig. 3-10 The pH response of single Si3N4 EIS structure.

Fig. 4-1 Picture of the chemical resistance experience of PDMS.
Table 4-1 Summery of solution NO.1~5. NO.1 and NO.3 are strong acid. NO.2 is strong base. NO.4 and NO.5 are organic solvents.
Fig. 4-2 Process flow chart for LAPS with PDMS encapsulation
Fig. 4-3 DM for Specifications of LASER diode
Fig. 4-4 Wave length and wave width of LED by spectrometer[9]
Fig. 4-5 Wave length and wave width of LD which is until stimulated emission
Fig. 4-6 The wave length and wave width of LD which is Lasing.
Fig. 4-7 The main control panel for self-designed voltage measurement program by LabVIEW
Fig. 4-8 The figure shows that process flow of voltage record graphical program.
Fig. 4-9 The stability test result of LD
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