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研究生:蔡翔任
研究生(外文):Hsiang-Jen Tsai
論文名稱:利用遮罩控制之低靜態功率消耗三元內容定址記憶體設計
論文名稱(外文):Reduce TCAM Static Power Consumption Using Mask-Gating Method
指導教授:張延任
指導教授(外文):Yen-Jen Chang
學位類別:碩士
校院名稱:國立中興大學
系所名稱:資訊科學與工程學系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
畢業學年度:97
語文別:中文
論文頁數:68
中文關鍵詞:三元內容定址記憶體遮罩控制漏電流低功率
外文關鍵詞:Ternary CAMmask gatingleakagelow power
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本論文中,我們提出一個以遮罩控制為基礎的三元內容定址記憶體(Ternary Content Addressable Memories,TCAM)架構,以達到降低靜態功率消耗的目的。相較於傳統TCAM架構的設計,我們提出的改進之處是利用了遮罩資料的連續特性,並使用分段和遮罩資料前後控制的方法減少遮罩記憶體正常運作的個數,用以達到節省靜態功率消耗的目的。本設計是使用UMC 90nm的製程來設計並驗證電路,對32b*128的TCAM陣列而言,實驗模擬結果在1.0V的供應電壓下,大約能夠節省23%~30%的靜態功率消耗。
This thesis proposes a low leakage TCAM design which uses mask power gating technique to reduce the static power dissipated in the mask SRAM. This reduction depends on continuous TCAM mask patterns where mask bits in a segment are all 1 or 0 except for the segment located at the boundary of the TCAM mask word. Our design exploits the fact where only mask bits of the boundary segment are active to significantly reduce the number of active mask cells. Using UMC 90 nm CMOS process with 1.0V supply voltage, the simulation results show more than 30% static power can be reduced with size of 32b*128 compared to the traditional TCAM design.
目錄
摘要 I
表格目錄 VII
圖目錄 VIII
1、 簡介 1
2、 傳統三元內容定址記憶體架構設計(Traditional Ternary CAM Design) 7
2.1 傳統TCAM的運作 7
2.2 TCAM的搜尋行為 15
2.3 TCAM的動態功率消耗分析 16
2.4 TCAM的靜態功率消耗分析 20
2.5 SRAM的控制技術及靜態功率消耗分析 23
2.5 遮罩資料的連續特性(Continuous feature of mask data) 26
2.6 相關研究 28
I. Ripple-Precharge TCAM:A Low-Power Solution for Network Search Engines 28
II. “Green” Micro-Architecture and Circuit Co-design For Ternary Content Addressable Memory 30
3、 遮罩控制低功率三元內容定址記憶體設計(Mask-Gating Ternary CAM Design) 32
3.1 遮罩資料的分段(Partition Mask Data) 33
3.2 MG-TCAM的結構(Structure of mask-gating TCAM) 37
3.3 區段內固定長度的分割方法(Partition methods with fixed length) 42
3.4 Prefix長度的分佈和VOPM(Prefix length distribution and VOPM) 44
4、 實驗結果分析(Simulation Results Analysis) 48
4.1 模擬時序圖 48
4.2 靜態功率消耗分析(Static Power Consumption) 56
4.3 效能分析(Search delay) 60
5、 結論 62
6、 未來展望 63
7、 參考文獻 64
[1]D.S. Vijayasarathi , M. Nourani, M.J. Akhbarizadeh, and P.T. Balsara, “Ripple-Precharge TCAM : A Low-Power Solution for Network Search Engines,” In Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp 243-248, Oct. 2005.
[2]V. Srinivasan, B. Nataraj, and S. Khanna, “Methods For Longest Prefix Matching In a Content Addressable Memory,” US Patent 6,237,061, January. 1999.
[3]M.J. Akhbarizadeh, M. Nourani, D.S. Vijayasarathi, and P.T. Balsara, “PCAM: A Ternary CAM Optimized for Longest Prefix Matching Tasks,” In Proceedings of the IEEE International Conference on Computer Design, pp. 6-11, Oct. 2004.
[4]R.A. Kempke, and A.J. McAuley, “Ternary CAM Memory Architecture and Methodology,” United States Patent 5,841,874, Aug. 1996.
[5]Sungdae Choi, K. Sohn, and Hoi-Jun Yoo, “A 0.7-fJ/Bit/Search 2.2-ns Search Time Hybrid-Type TCAM Architecture,” IEEE Journal of Solid-State Circuits, Vol. 40, No. 1, pp. 254-260, Jan. 2005.
[6]RFC1519, the Internet Engineering Task Force, www.ietf.org, 2005.
[7]Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, and Wei Hwang, ““Green” Micro-Architecture and Circuit Co-Design for Ternary Content Addressable Memory,” IEEE International Symposium on Circuits and Systems, pp. 3322-3225, May. 2008.
[8]bgp.potaroo.net, “BGP Routing Table Analysis Reports,” 2008.
[9]Cadence Design Systems Inc., “Virtuoso Layout Editor Users Guide - Version 4.4.6,” June. 2000.
[10]National Chip Implementation Center, www.cic.org.tw, 2008.
[11]Chi-Sheng Lin, Kuan-Hua Chen, and Bin-Da Liu, “Low-Power and Low-Voltage Fully Parallel Content-Addressable Memory,” In Proceedings of the International Symposium on Circuits and Systems, ISCAS ''03, pp. 373-376, May. 2003.
[12]J.G. Delgado-Frias, A. Yu, and J. Nyathi, “A Dynamic Content Addressable Memory Using a 4-Transistor Cell,” Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications, pp. 110-113, July. 1999.
[13]Kuo-Hsing Cheng, Chia-Hung Wei, and Shu-Yu Jiang, “Static Divided Word Matching Line For Low-power Content Addressable Memory Design,” In Proceedings of the International Symposium on Circuits and Systems, ISCAS ''04, May. 2004.
[14]Rahul M. Rao, Jeffrey L. Burns, and Richard B. Brown, “Circuit Techniques for Gate and Sub-Threshold Leakage Minimization in Future CMOS Technologies,” In Proceedings of the 29th European Solid-State Circuits Conference, ESSCIRC ''03, pp. 313-316, Sept. 2003.
[15]Taskin Kocak, and Faysal Basci, “A Power-Efficient TCAM Architecture for Network Forwarding Tables,” Journal of Systems Architecture, Vol. 52, No. 5, pp.307-314, May. 2006.
[16]Nitin Mohan, and Manoj Sachdev, “Low Power Dual Matchline Ternary Content Addressable Memory,” In Proceedings of the International Symposium on Circuits and Systems, ISCAS ''04, pp.633-6 Vol.2, May. 2004.
[17]I. Arsovski, T. Chandler, and A. Sheikholeslami, “A Ternary Content Addressable Memory (TCAM) Based on 4T Static Storage and Including a Current-Race Sensing Scheme,” IEEE Journal of Solid-State Circuits, Vol. 38, No. 1, pp.155-158, Jan. 2003.
[18]Xin Yang, S. Sezer, J. McCanny, and D. Burns, “Novel Content Addressable Memory Architecture for Adaptive Systems,” Second NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2007, pp. 633 - 640, Aug. 2007.
[19]M. Nourani, D.S. Vijayasarathi, and P.T. Balsara, “A Reconfigurable CAM Architecture for Network Search Engines,” International Conference on Computer Design, ICCD 2006, pp.82 - 87, Oct. 2007.
[20]賴威豪著, “利用"Don’t Care"資訊之低功率三元內容定址記憶體設計,”國立中興大學資訊科學與工程研究所碩士學位論文, 2008.
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