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研究生:王文佑
論文名稱:模組化在積分三角類比數位器中由有限與非線性運算放大器增益所產生之非線性諧波失真
論文名稱(外文):Modeling Harmonic Distortion by the Effect of Finite and Nonlinear DC-Gain of the Op-Amp for Switched-Capacitor Sigma-Delta Modulators
指導教授:陳福川陳福川引用關係
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電機與控制工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:97
語文別:英文
論文頁數:49
中文關鍵詞:三角積分數位類比轉換器非線性諧波失真運算放大器非線性增益
外文關鍵詞:Sigma Delta ModulatorADCNonlinear gainDistortion
相關次數:
  • 被引用被引用:0
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  • 下載下載:18
  • 收藏至我的研究室書目清單書目收藏:0
本篇論文目的在於推導一個不同以往可用於三角積分器最佳化設計之積分器快速諧波失真模型,本篇論文詳細分析了積分器非線性特性進而獲得完整的非線性積分器非線性直流增益諧波失真數學模組,更由於主要的諧波失真來自於第一級的積分器,所以我們的數學模組可廣泛應用在各種不同積分三角數位類比轉換器的架構,一般常見的論文為了達到低功率消耗與系統高解析度的設計,往往直接提高過多的直流增益值或消耗大量的最佳化時間,這在現今要求高效率與低耗能的產品要求下,是非常不利於設計者的.為了證明我們的模組不但比傳統的模型快速而且結果能讓設計者使用,最後我們將同時利用行為模組以及電晶體電路實際去驗證我們的諧波失真模型是可以在最快速的運算下,得到設計者想要的最佳化結果.
The purpose of this paper is to introduce a new modeling of op-amp induced harmonic distortion in sigma-delta modulator, which is aimed to optimum design of SDM for high-performance applications. We analyze complete nonlinear characteristic in integrator to obtain analytic models to represent harmonic distortion as function of op-amp nonlinear DC-gain. Our model can apply for all modulator architectures where harmonic distortion is dominated by the first integrator in the chain. In order to achieve the low-power requirement and high-resolution, general approaches adopt either time-wasting model or high-power DC-gain. We show that results provided by our distortion model fit well to that obtained by simulation in behaving model and transistor level. It is accurate and fast than provided by previously reported modeling approaches.
中文摘要 I
English Abstract II
Acknowledgment III
Contents IV
Lists of Tables V
Lists of Figures XI
List of Symbols XIII
Chapter1 Introduction 1
1.1 Current Status and Background 1
1.2 Motivation and Aims 2
1.3 Organization 3
Chapter2 Fundamental Theorems and Architectures of SDM 4
2.1 Nyquist Sampling Theorm 4
2.2 Quantization Noise and Peak SNR 6
2.3 Techniques of Sigma-Delta Modulator 8
2.3.1 Oversampling Technique 9
2.3.2 Noise shaping 10
2.4 Architectures of Sigma-Delta Modulator 12
2.4.1 First-Order Sigma-Delta Modulator 13
2.4.2 Single-Loop Second-Order Sigma-Delta Modulator 15
2.4.3 Single-Loop High Order Sigma-Delta Modulator 17
2.4.4 Interpolative Sigma-Delta Modulator 18
2.4.5 MASH Architecture 19
2.4.6 Multi-bit Quantizer Sigma-Delta Modulator 20
2.4.7 Multi-bit Sigma-Delta Modulator use DEM Technique 22
2.4.8 Decimator 23
2.4.9 Performance Metrics for a Modulator 24
Chapter3 OTA Non-Linear Gain Curve 26
Chapter4 Distortion Due to the Non-Linear Gain of the Operational Amplifier 33
Chapter5 Behaving Model Simulation Results 38
Chapter6 Transistor Level Simulation Results 41
Chapter7 Conclusions and Future Works 43
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