|
[1]. Shahriar Rab. A 1.8-V digital-audio sigma-delta modulator in 0.8-μm CMOS. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 6, JUNE 1997 [2]. Mohamed Dessouky and Andreas Kaiser. Very low-voltage digital-audio ΔΣ modulator with 88-dBdynamic range using local switch bootstrapping. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 3, MARCH 2001 [3]. Noura Ben Ameur. “Design of Efficient Digital Interpolation Filters and Sigma-Delta Modulator for Audio DAC”. International Conference on Design & Technology of Integrated Systems in Nanoscale Era. 2008 [4]. Min Gyu Kim. “A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC”. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 5, MAY 2008 [5]. Hsin-Liang Chen, Yi-Sheng Lee, and Jen-Shiun Chiang, “Low Power Sigma Delta Modulator with Dynamic Biasing for Audio Applications”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 5, MAY 2007 [6]. Mohammad Ranjbar G.Roientan Lahiji Omid Oliaei. “A Low Power Third Order Delta-Sigma Modulator For Digital Audio Applications”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , ISCAS 2006 [7]. Daniel Quoc-Dang Ho, Chinchi Chang, Jeetin Rathore, Lewelyn D'Souza, Yuwen Swei, Kuan-Dar Chen, Jyhfong Lin. A Low-Power and Compact Sigma-Delta Voice-band Codec in a 0.18-nim CMOS Technology. VLSI Design, Automation and Test, 2006 International Symposium on April 2006 [8]. R. Gaggl, A. Wiesbauer, G. Fritz, C. Schranze, P. Pessel. A 85-dB Dynamic Range Multibit Delta-Sigma ADC for ADSL-CO Applications in 0.18-μm CMOS. IEEE J. Solid-State Circuits, vol. 38, pp. 1105-1114, Jul. 2003. [9]. R. d. Rio, J. M. Rosa, B. P. Verdu. Highly Linear 2.5-V CMOS Modulator for ADSL+. IEEE Trans. Circuits Syst. I, vol. 51, pp. 47–62, Jan. 2004. [10]. Shahana T. K., Babita R. Jose, Rekha K. James, “RNS based Programmable Multi-mode Decimation Filter for WCDMA and WiMAX”, Vehicular Technology Conference, 2008. VTC Spring 2008. IEEE 11-14 Page(s):1831 – 1835 May 2008 [11]. A. Tang, F. Yuan, and E. Law, “A New WiMAX Sigma-Delta Modulator with Constant-Q Active Inductors” Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on 18-21 Page(s):1304 – 1307 May 2008 [12]. Raf Schoofs, , Michiel S. J. Steyaert, , and Willy M. C. Sansen,, “A Design-Optimized Continuous-Time Delta–Sigma ADC for WLAN Applications” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 54, NO. 1, JANUARY 2007 [13]. Ming Liu, Hong Chen, Run Chen, Zhihua Wang, “Low-Power IC Design for a Wireless BCI system” 18-21 Page(s):1560 - 1563 Digital Object Identifier 10.1109/ISCAS.2008.4541729 May 2008 [14]. J. Oliver, M. Lehne, K. Vummidi, A. Bell, S. Raman, “A Low Power CMOS Sigma-Delta Readout Circuit for Heterogeneously Integrated Chemoresistive Micro-/Nano- sensor Arrays” Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on 18-21 Page(s):2098 – 2101 May 2008 [15]. K. A. Shehata , and H. F. Ragai , H. Husien, “DESIGN AND IMPLEMENTATION OF A HIGH SPEED LOW POWER 4-BIT FLASH ADC” Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on 2-5 Page(s):200 - 203 Sept. 2007 [16]. Ioannis Ch. Paschalidis, Member, IEEE, Wei Lai, Student Member, IEEE, and David Starobinski, “Asymptotically Optimal Transmission Policies for Large-Scale Low-Power Wireless Sensor Networks” IEEE/ACM TRANSACTIONS ON NETWORKING, VOL. 15, NO. 1, FEBRUARY 2007 [17]. Chi Zhang, Erwin Ofner, “ASIC Implementation of Low Power Decimation Filter for UMTS and GSM Sigma-Delta A/D Converter”, Signal Design and Its Applications in Communications, 2007. IWSDA 2007. 3rd International Workshop on 23-27 Page(s):224 – 227 Sept. 2007 [18]. Michael Nielsen and Torben Larsen, “A Transmitter Architecture Based on Delta–SigmaModulation and Switch-Mode Power Amplification” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 54, NO. 8, AUGUST 2007 [19]. Inhee Lee, Youngcheol Chae, and Gunhee Han,” A Low Power Dual-Mode Sigma-Delta Modulator for GSM/WCDMA Receivers” Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on 11-14 Dec. 2007 Page(s):1151 – 1154 [20]. Erik Lauwers and Georges Gielen. Power Estimation Methods for Analog Circuits for Architectural Exploration of Integrated Systems. IEEE Transactions on very lary large scale integration(VLSI) systems. vol. 10, no.2, APRIL 2002 [21]. Khaled-Abdelfattah and Behzad-Razavi. Modeling Op Amp Nonlinearity in Switched-Capacitor Sigma-Delta Modulators. IEEE CICC, pp. 197-200, Sept. 2006. [22]. Alireza Mahmoodi and Dileepan Joseph. Optimization of Delta-Sigma ADC for Column-Level Data Conversion in CMOS Image Sensors. IEEE Instrumentation and Measurement pp.1-3, May. 2007. [23]. M. Webb, Hua Tang. Analog Design Retargeting by Design Knowledge Reuse and Circuit Synthesis. IEEE International Symposium on Circuits and Systems 2008 [24]. Hashem Zare-Hoseini and lzzet Kale. On the Effects of Finite and Nonlinear DC-Gain of the Amplifiers in Switched-Capacitor ΔΣ Modulators. Digital Object Identifier 10.1109/ISCAS.2005.1465145. vol. 3, pp. 2547 - 2550. May. 2005. [25]. Matthew R. Miller and Craig S. Petrie. A Multibit Sigma–Delta ADC for Multimode Receivers. SOLID-STATE CIRCUITS, VOL. 38, NO. 3, MARCH 2003 [26]. F. Medeiro, et al. A 13-bit, 2.2-MS/s, 55-mW Multibit Cascade Sigma-Delta Modulator in CMOS 0.7-um Single-Poly Technology. IEEE J. Solid-State Circuits,Vol. 34, pp. 748-760, June 1999. [27]. Stephen Au and Bosco H. Leung. A 1.95-V, 0.34-mW, 12-b Sigma-Delta Modulator Stabilized by Local Feedback Loops. SOLID-STATE CIRCUITS, VOL. 32, NO. 3, MARCH 1997 [28]. Amitava Banerjee, Subho Chatterjee, Amit Patra and Siddhartha Mukhopadhyay. An Efficient Approach to Model Distortion in Weakly Nonlinear Gm − C Filters. IEEE International Symposium on Circuits and Systems 2008 [29]. P. Malcovati et al. Behavioral Modelling of Switched-Capacitor Sigma–Delta Modulators. IEEE Transactions On Circuits and Systems, Vol. 50, No. 3, MARCH 2003. [30]. Yves-Geerts, Michiel-Steyaert and Willy-Sansen. Design of multi-bit Delta-Sigma A/D converters. 2002 [31]. F.Medeiro, B.Perez-Verdu, A.Rodriguez-Vazquez and J.L.Huertas. Modeling OpAmp-Induced Harmonic Distortion for Switched-Capacitor ∑∆ Modulator Design. IEEE Circuits and Systems, vol. 5, pp. 445-448, May. 1994. [32]. A. Johns and K. Martin, Analog Integrated Circuit Design. John Wiley & Sons, Inc., 1997. [33]. Miller and S. Petrie, “A Multibit Sigma-Delta ADC for Multimode Receivers,” IEEE J. Solid-State Circuits, vol. 38, pp. 475-482, March 2003. [34]. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill series in electrical and Computer engineering, McGraw-Hill, 2001. [35]. B. Nerurkar, K. H. Abed, R. E. Siferd, V. Venugopal, “Low power sigma delta decimation filter,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, pp. 647-650, Aug. 2002. [36]. Y. F. Mok, A. G. Constantinides, P. Y. K. Cheung, “A VLSI decimation filter for sigma-delta A/D Converters,” in Proc. IEEE Int. Conf. Advanced A-D and D-A Conversion Techniques and their Applications, pp. 36-41, Jul 1994. [37]. S. Nadeem, W. Lee, and C. Sodini, “A Higher Order Topology for Interpolative Modulators for versampling A/D Converters,” IEEE Trans. Circuits Syst., Vol. 37, No 3, pp. 309–318, March 1990. [38]. d. Rio, J. M. Rosa, B. P. Verdu……., “Highly Linear 2.5-V CMOS Modulator for ADSL+,” IEEE Trans. Circuits Syst. I, vol. 51, pp. 47–62, Jan. 2004. [39]. Vleugels, S. Rabii and B. Wooley, “A 2.5-V Sigma-Delta Modulator for Broadband Communication Applications,” IEEE J. Solid-State Circuits, vol. 36, pp. 1887-1899, Dec. 2001. [40]. Gaggl, A. Wiesbauer, G. Fritz, C. Schranze, P. Pessel, “A 85-dB Dynamic Range Multibit Delta-Sigma ADC for ADSL-CO Applications in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol. 38, pp. 1105-1114, Jul. 2003. [41]. Peluso, M. Steyaert and W. M. C. Sansen, Design of low-voltage low-power CMOS delta sigma A/D Converters, Kluwer Academic Publishers, 1999. [42]. D. Norsworthy, R. Schreier, and G. C. Temes, Delta-Sigma Data Converters–Theory, Design, and Simulation. Piscataway, NJ:IEEE Press, 1997. [43]. Rebeschini, N. R. Van Bavel, P. Rakers, R. Greene, J. Caldwell, and J. R. Haug, “A 16-b 160-kHz CMOS A/D Converter Using Sigma-Delta Modulation,” IEEE J. Solid-State Circuit, vol. 25, pp. 431-440, April 1990. [44]. Van de Plassche, R. J. and Goedhart, D., “A monolithic 14-bit D/A converter,” IEEE J. Solid-State Circuits, pp. 552–556, January 1997. [45]. Carley, L. R., “A noise-shaping coder topology for 15+ bit converters,” IEEE J. Solid-State Circuits, pp. 267–273, April 1989. [46]. Chen, F. and Leng, “A high resolution multibit sigma-delta modulator with individual level averaging,” IEEE J. Solid-State Circuits, pp. 453–460, April 1995. [47]. Baird, R. T. and Fiez, T. S., “Linearity enhancement of multibit A/D and D/A converters using data weighted averaging,” IEEE Trans. Circuits Syst. II, vol. 42, pp. 753–762, December 1995. [48]. V.F.Dias, G.Palmisano, and F.Maloberti. Harmonic Distortion in SC Sigma-Delta Modulators. IEEE Circuits and Systems, Vol. 41, NO. 4, APRIL. 1994. [49] Hashem Zare-Hoseini, Izzet Kale, and Omid Shoaei. Modeling of Switched-Capacitor Delta-Sigma Modulators in SIMULINK. IEEE transactions on instrumentation and measurement. Vol.54. NO.4. pp.1646-1654. AUGUST 2005
|