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研究生:黃啟仁
研究生(外文):Ci-Ren Huang
論文名稱:一維可逆式四捨五入非遞迴離散週期性小波轉換之FPGA硬體實現
論文名稱(外文):FPGA Hardware Implementation of The 1-D RRO-NRDPWT
指導教授:洪金車
指導教授(外文):King-Chu Hung
學位類別:碩士
校院名稱:國立高雄第一科技大學
系所名稱:電子與資訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
語文別:中文
論文頁數:77
中文關鍵詞:小波轉換
外文關鍵詞:wavelet
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  • 被引用被引用:3
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心臟是人體最重要的器官,心臟病患的照護與急救皆須仰賴長期的心電圖記錄與即時的資料傳輸,為了方便患者的日常生活通常會使用行動式擷取裝置。長期的心電圖記錄需要花費大量的儲存空間,為滿足如此龐大的資料儲存與傳輸需求,多種心電圖資料壓縮技術乃因應而生,其中以Wavelet-based壓縮法[1]可得到最佳的壓縮效能。然傳統Wavelet-based壓縮法係採用遞迴式小波轉換,不適合使用有限位元來處理;因為有限位元處理中的位元成長效應會掩蓋各階量化對失真度(PRD)及壓縮比(CR)的個別影響。為消除位元成長效應的影響,結合可逆式四捨五入線性轉換(RROLT)理論與一維非遞迴式離散週期性小波轉換(1-D NRDPWT)之1-D RRO-NRDPWT因而被提出並成功應用於心電圖資料壓縮[3-4]。此新小波轉換演算法使用兩機制,可阻斷誤差傳播鏈及最小化小波係數的動態區間,有效抑制位元成長效應,以提供線性的PRD-CR壓縮曲線之規劃。此線性特性及固定位元運算能力,有利於12導程具重建品質保證之即時心電圖記錄器的實現。
本篇論文藉由ALTERA DE2 多媒體開發平台,開發1-D RRO-NRDPWT之硬體,藉此驗證此心電圖壓縮系統設計[2]之可行性,提高設計實現之價值。在硬體的運算時序規劃中,特別運用DRAM讀取時之系統閒置時間,採用平行運算方式規劃,藉此可減少27.25%的執行時間。並且深入分析1-D RRO-NRDPWT於有限位元情況下的運算誤差,及考慮量化所產生之量化誤差對1-D RRO-NRDPWT係數重建情況之影響,決定最合適的運算位元數。同時,分散轉換矩陣能量,降低59.38%的硬體成本。透過本篇論文之設計,在不考慮量化之下,除了可以降低硬體成本的付出外,還可滿足即時(Real-Time)運算的要求。
The heart is the most important organ for human being, the patients with cardiac disease require long-term ECG record and real-time data transmission when they need to be watched over or even taken first aid. In order to make the patients feel convenient in their daily lives, they usually have to use the portable extraction equipment. Long-term record will demand huge space to store ECG signals. To solve the problem including store and transmission, many kinds of ECG data compression methods have been proposed. Because it has excellent compression efficiency, so the wavelet-based compression method [1] is the best method. However, the traditional wavelet transform uses finite bits to process, which is not fit very well. The word-length-growth effect which results from the finite bits process can cover up the effect of quantization to percent root mean square difference (PRD) and compression rate (CR). To prevent the word-length-growth effect, 1-D RRO-NRDPWT composed of reversible round-off linear transformation (RROLT) theorem and 1-D non-recursive discrete periodized wavelet transform (1-D NRDPWT) has been presented and successfully applied to ECG data compression. The new algorithm of wavelet transform that comprises two kinds of mechanism can stop the error-propagation effect chain, minimize the dynamic range for the wavelet coefficient to prevent word-length-growth effect and obtain the linear scheme for PRD-CR curve. These characteristics for a linear curve and finite bits operation can help to implement the 12-lead ECG record equipment that has real-time and maintain-quality reconstruction.
This study utilizes ALTERA DE2 as a platform to implement 1-D RRO-NRDPWT, which identifies whether ECG data compression implement or not. In this paper, the hardware could be exactly implemented. Furthermore, we apply the idle time and parallel timing computing to decreasing 27.25% execution time when the system is executing reading or writing. Also, we analysis computing distortion to 1-D RRO-NRDPWT under the finite bits, and consider how much quantization is distortion will affect reconstruction of 1-D RRO-NRDPWT when quantization is executed. So, we can decide the most appropriate bits to be computed. Distributing the energy of the transform matrix will reduce 59.38% cost for the hardware. In this study, if we don’t consider the quantization process for hardware, the cost of the hardware will shorten and also correspond to the real-time compute required.
中文摘要 ••••••••••••••••••••••••••••••• Ⅰ
英文摘要 ••••••••••••••••••••••••••••••••• Ⅱ
致謝 ••••••••••••••••••••••••••••••••• Ⅳ
目錄 •••••••••••••••••••••••••••••••• Ⅵ
表目錄 ••••••••••••••••••••••••••••••• Ⅶ
圖目錄 •••••••••••••••••••••••••••••• IV

第一章 緒論•••••••••••••••••••••••••••••• 1
1-1 研究背景•••••••••••••••••••••••• 1
1-2 研究動機與目的••••••••••••••••••••• 4
1-3 硬體平台•••••••••••••••••••••••• 4
1-4 論文架構•••••••••••••••••••••••• 6
第二章 一維非遞迴式離散週期性小波轉換••••••••••••••• 7
2-1傳統遞迴式離散週期性小波轉換•••••••••••••• 7
2-2非遞迴式離散週期性小波轉換•••••••••••••• 10
2-3可逆式四捨五入線性轉換•••••••••••••••• 18
第三章 心電圖壓縮系統•••••••••••••••••••••• 25
3-1基於傳統小波轉換之心電圖壓縮系統••••••••••• 25
3-2基於1-D RRO-NRDPWT之心電圖壓縮系統•••••••• 26
3-3非線性量化演算法之基本原理•••••••••••••• 28
第四章 1-D RRO-NRDPWT硬體設計••••••••••••••••• 33
4-1 設計流程•••••••••••••••••••••••• 33
4-2 軟體模擬•••••••••••••••••••••••• 34
4-2-1 MATLAB模擬•••••••••••••••••• 34
4-2-2 C++模擬••••••••••••••••••••• 38
4-3硬體規劃••••••••••••••••••••••• 40
4-3-1運算時序規劃•••••••••••••••••• 43
4-3-2運算位元數規劃••••••••••••••••• 44
4-4有限位元分析••••••••••••••••••••• 45
4-4-1分析基礎••••••••••••••••••••• 47
4-4-2小波轉換有限位元分析••••••••••••••• 48
4-4-3量化對有限位元之影響••••••••••••••• 56
4-5轉換矩陣能量分析••••••••••••••••••• 59
4-6硬體設計••••••••••••••••••••••• 61
4-6-1記憶體控制單元•••••••••••••••••• 61
4-6-2寫入轉換係數單元••••••••••••••••• 63
4-6-3矩陣運算單元••••••••••••••••••• 65
第五章 FPGA驗證結果與探討••••••••••••••••••• 69
5-1軟體模擬結果••••••••••••••••••••• 69
5-2硬體驗證結果••••••••••••••••••••• 70
5-3分析與探討•••••••••••••••••••••• 74
第六章 結論與未來展望•••••••••••••••••••••• 76
參考文獻 ••••••••••••••••••••••••••••••• 77
[1]L. U. Z., D. Y. Kim, and W. A. Pearlman, “Wavelet compression of ECG signals by the set partitioning in hierarchical trees algorithm,” IEEE Transaction on Biomedical Engineering, vol. 47, pp. 849-856 July 2000.
[2] C. T. Ku, H. S. Wang, K. C. Hung, and Y. S. Hung, “A novel ECG data compression method based on non-recursive discrete periodized wavelet transform,” IEEE Transaction on Biomedical Engineering, vol. 53, pp.2577-2583, Dec. 2006.
[3] C. T. Ku, H. S. Wang, K. C. Hung, “High efficient ECG compression base on reversible round-off non-recursive 1-D discrete periodized wavelet transform,” Medical Engineering and Physics, pp. 1-18, Dec. 2006.
[4] C. T. Ku, H. S. Wang, K. C. Hung, and Y. S. Hung, “A Novel ECG Data Compression Based On Reversible Round-Off 1-D NRDPWT.” IEEE International Symposium on Intelligent Signal Processing and Communication System, pp. 602-605, Dec. 2006.
[5] Y. H. Seo and D. W. Kim, “VLSI Architecture of Line-Based Lifting Wavelet Transform for Motion JPEG2000,” IEEE Journal of Solid-State Circuits, vol.42, No. 2, pp 431-440, FEBRUARY 2007.
[6] I. Daubechies, “Ten lectures on wavelet,” Ser. No.61 in CBMS-NSF series in Applied Mathematics. Philadelphia, PA: SIAM, 1992.
[7]鄭羽伸,2006,Verilog 數位電路設計-範例寶典(基礎篇),初版,儒林。
[8]鄭信源,2003,Verilog 硬體描述語言數位電路-設計實務,三版,儒林。
[9]MIT心律不整心電圖資料庫 http://www.physionet.org/physiobank/database/mitdb/。
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