傳統的電壓域溫度感測器，一般都是以雙載子電路來做溫度感測，及依靠ADC(類比至數位轉換器)做數位輸出轉換，如此將會造成晶片面積上升以及更高的功率消耗。而時域型智慧型溫度感測器即被提出以適用於SOC 或是VLSI積體化整合。
本研究主要貢獻在於提出循環式架構以取代先前之線性架構，解決了位元數上升，面積亦隨之增加之困擾；其所採用之由CMOS NAND2 組成的循環式溫敏延遲線，可將溫度(類比訊號)轉成相對應之時間延遲訊號，而具溫度補償之低溫敏循環式參考時間延遲線所造成之時間延遲訊號則與數位值有關而與溫度低度相關，最後搭配連續逼近暫存器(SAR)，透過時間比較器比較溫敏及低溫敏的延遲時間，隨著循環式溫敏延遲線的變化，由連續逼近暫存器使低溫敏循環式參考時間延遲線適當的調整，來決定對應該待測溫度之數位值。該晶片由TSMC 2P4M 0.35um製程所生產，核心面積只有0.5m*0.5m。溫度範圍為0°C∼90°C，在一次線性回歸後的模擬誤差只有±0.6°C，由於採用11 Bits的SAR，其溫度的有效解析度為0.05°C。功率消耗僅為50uW，非常適合統整於VLSI或SOC晶片。

Conventional voltage-domain smart temperature sensors usually utilize BJT-based circuits for the temperature sensing, and rely on ADCs for digital output conversion, which occupy large chip areas and have higher power consumptions. Therefore, the time-domain sensors are proposed to be applicable for SOC or VLSI integration.
To achieve the goals of low-cost and low-power in the portable systems, a temperature dependent delay time circuit, which composed of a cyclic delay line with CMOS NAND rather than the linear delay line, is utilized to generate a delay time proportional to the measured temperature. A novel adjustable reference delay time circuit with temperature-compensation is designed to produce the low temperature-sensitive delay time proportional to the digital control code. As a result, the temperature resolution can be increased without much increase in chip area. A SAR (successive approximation register) control logic is adopted for selecting the optimal reference delay time by time comparator for digital output coding. The core area is 0.5m*0.5m only in a TSMC standard 0.35-μm 2P4M CMOS process. For the first-order linear regression analysis, the achieved error is within ± 0.6°C in the temperature range of 0°C~90°C. The effective resolution is about 0.05°C with an 11bits SAR. The power consumption is 50uW, which is very suitable for integrating with VLSI or SOC chips.

中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
圖目錄 vi
表目錄 ix

第一章 序論 1

1-1 研究動機 1
1-2 論文架構 3

第二章 溫度感測器 4

2-1溫度感測器應用與簡介 4
2-2 溫度感測器的相關參數 5
2-2-1 溫度範圍 5
2-2-2 精確度 6
2-2-3 成本 6
2-2-4 解析度 6
2-3 典型的溫度感測器架構 7
2-3-1 溫度感測警示調節結構 8
2-4 時間至數位轉換器簡介 11
2-4-1 計數器方法之時間至數位轉換器 11
2-5 時間軸為基礎之溫度感測器 15
2-6 循環式時間至數位轉換器為基礎之溫度感測器 15
2-6-1 溫度補償電路實現之溫度至脈衝產生器 18
2-6-2 循環式時間至數位轉換器 20
2-7 FPGA為主體之溫度感測器 21
2-8 時域智慧型感測器 26

第三章 時域循環式智慧型溫度感測器 29

3-1 設計步驟 29
3-2 低成本互補式金氧半時域循環式智慧型溫度感測器 31
3-3 工作原理 32
3-4 延遲線 34
3-4-1 溫度相依延遲時間電路 35
3-4-2 可調整參考時間延遲電路 41
3-4-2.1 與溫度無關之補償電路原理說明 42
3-4-3 非均質與均質之脈衝縮減延遲線 46
3-5 載入式計數器 47
3-6 連續逼近暫存器與可調整時間延遲電路 50
3-6-1 Metastability說明 54

第四章 電路設計與模擬 56

4-1 設計流程與考量 56
4-2 溫敏電路的設計與模擬 59
4-3 低溫敏電路的設計與模擬 61
4-4 整體架構之電路模擬 63
4-5 晶片佈局 67

第五章 結論與未來展望 69

5-1結論 69
5-1-1測試考量與量測步驟 71
5-2未來展望 73

參考文獻 74

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