# 臺灣博碩士論文加值系統

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 在論文中，我們使用partial linear feedback shift register(LFSR)去減少測試集合(test sets)。傳統上，LFSR 架構是利用static LFSR reseeding。額外增加位元是被用來產生test vector 以減少測試資料數量。方法將產生測試向量經由解線性方程組，求解出LFSR seed。因此最後的seeds 集合是少於原測試向量。我們分析don’tcare 位元是否影響seed 大小。我們發現當don’t care 位元數量是很小，其seed 的大小是相對的很小。這篇論文中，我們提出一個重新排列策略為測試集合中調整don’t care 位元分佈去增加壓縮率。實驗結果顯示我們提出的方法可以改善壓縮率。
 In the thesis, we use the partial linear feedback shift register (LFSR) to reducetest data volume. Traditionally, LFSR structure is used in static LFSR reseeding. Theadditional bit are used to generate the test vector for reducing the amount of test data.The method generates the test vectors by solving linear equations to reduce the LFSRseed. Thus the final set of seeds is less than the original test vectors. We analyze theeffect of the don’t care bit to the size of seed. We find that when the number of don’tcare bit is small, the size of seed is relative smaller.In this thesis, we propose a reorder strategy to adjust the distribution of don’tcare bit in the test set to increase the compression ratio. The results of the work showthat the compression ratio can be improved by the proposed method.
 摘 要......................................................................................................................... iiiAbstract ............................................................................................................................. iv第一章 緒論.................................................................................................................1第一節 單晶片測試介紹...........................................................................................2第二節 Test-per-scan架構.........................................................................................3第三節 Test-per-clock架構.......................................................................................3第二章 LFSR相關技術...............................................................................................5第一節 線性方程組與seed介紹...............................................................................5第二節 LFSR reseeding...........................................................................................11第三節 Seed overlapping.........................................................................................13第四節 Partial LFSR reseeding ...............................................................................15第一小節 Partial LFSR method.......................................................................15第二小節 Partial LFSR形成和解線性方程組................................................15第三章 重組test set增進壓縮效率............................................................................18第一節 test vector reorder...............................................................................18第二節 test vector中specified bits分佈...................................................................19第三節 scan window................................................................................................21第四節 test vector reorder using minimun seed ......................................................23第五節 交錯式(interleaved)重組............................................................................25第一小節 策略一test vector中specified bits多搭配少...................................25第二小節 策略二test vector中specified bits少搭配多...................................30第四章 實驗結果.......................................................................................................35第五章 結論與未來研究方向...................................................................................39Bibliography .....................................................................................................................40
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