目前非揮發性記憶體在元件尺寸持續的微縮下，其需求為高密度記憶單元、低功率損耗、快速讀寫操作以及良好的可靠度(Reliability)。然而傳統浮動閘極(Floating gate)記憶體在操作過程中，穿遂氧化層產生漏電路徑會造成所有儲存電荷流失回到矽基板，隨著尺寸微縮這種情況會更趨嚴重，所以在資料保存時間(Retention)和抗劣化程度(Endurance)的考量下，微縮穿遂氧化層的厚度是非常困難的。具非揮發性奈米點記憶體及SONOS記憶體被提出並希望可取代傳統浮動閘極記憶體，由於彼此分離的儲存點作為儲存中心，所以上述兩者可以有效改善小尺寸記憶體元件多次讀寫操作下的資料儲存能力。
在本論文中，利用改變奈米點的結構與組成來克服傳統非揮發性記憶體在微縮過程中會遭遇到的困難，並更進一步地增加資料保存時間(Retention)。我們首先製作一層鎳化矽薄膜作為鎳矽奈米點的自我析出層(Self-assembled layer)，並應用在奈米點非揮發性記憶體上。在室溫環境中，利用分層濺鍍(Sputtering)鎳矽(NiSi2)靶材的方式來形成單層及雙層電荷儲存層，而雙層電荷儲存層又以約30 Å的氧化矽隔開，接著再沉積氧化矽作為控制氧化層(control oxide) ，並經由快速熱退火(RTA)通以氧氣以達到氧化層修補作用且提供鎳化矽足夠熱能使之移動以達最小自由能而形成均勻且高密度的鎳矽奈米點埋藏於氧化層中。由於儲存中心的增加及庫倫斥力的影響，雙層結構之奈米點記憶體記憶窗口和資料保存時間會較單層的鎳矽奈米點有明顯地增加。
同樣地，我們在室溫環境中利用濺鍍鎳矽靶材並通以氬氣與氨氣混氣使之與鎳化矽形成一層氮矽化合物。之後我們同樣經由快速熱退火(RTA)通以氧氣以達到氧化層修補作用及提供鎳化矽足夠動能移動達最小自由能並形成均勻且高密度的奈米點埋藏於氧化層中，而我們藉由TEM、XPS分析可知此奈米點的結構為鎳矽氮/氮化矽複合奈米點。根據後續的電性量測我們更發現鎳矽氮/氮化矽複合奈米點製程相對於傳統鎳奈米點製作，由於介面形成之緻密氮化層使一萬秒後的資料保存時間由原本僅通氬氣的50%提升到72%。甚至相較於僅通氬氣的雙層結構奈米點記憶體68%有更好的資料保存時間。且我們做了一萬次連續寫入抹除的抗劣化性(Endurance)測試實驗中發現，其平帶電壓幾乎沒有受到影響。
故我們可以利用在沈積奈米點儲存層時通以氨氣的方式來達到相同於雙層結構的記憶體特性，以達製成程序簡化的目的。最後，我們所提出的奈米點結構與製造技術都可以應用於非揮發性奈米點記憶體的製程技術同時也適用於現階段積體電路製程。

Current requirements of nonvolatile memory (NVM) are the high density cells, low-power consumption, high-speed operation and good reliability for next-generation NVM application. However, all of the charges stored in the floating gate will leak into the substrate if the tunnel oxide has a leakage path in the conventional NVM during endurance test. Therefore, the tunnel oxide thickness is difficult to scale down in terms of charge retention and endurance characteristics. Nanocrystals (NCs) NVMs are one of the promising candidates to substitute for conventional floating gate memory since the discrete storage nodes as the charge storage media can effectively enable the improvement of data retention for the scaling down device.
In this thesis, we try to overcome the limitation of conventional NVMs during the scaling down process and further increase the retention time by means of changing the structure of Nanocrystals NVMs. Firstly, we deposit a NiSi2 layer as the nanocrystal self-assembled layer and thereby apply it to Nanocrystals NVMs. In room temperature, we bombard NiSi2 target to form single layer and double layer charge trapping layer through sputtering system layer by layer, and the two charge trapping layers are separated by 30 Å silicon-oxide (SiO2). Next, we also deposit silicon oxide as control oxide. According to rapid thermal anneal (RTA) mix oxide gas, we improve the oxide quality and supply NiSi2 sufficient energy to reach the smallest Gibbs free energy so as to form uniform and high density NiSi nanocrystal. On account of the increasing of trapping center and the coulomb repulsion power, the double layer structure NiSi Nanocrystals NVMs has better memory window and retention than the single layer one.
In the similar process, we sputter NiSi2 target with Ar gas mixes NH3 gas to form silicon-nitride compound layers. Then, we use the same RTA process to form nanocrystal and improve the oxide quality. In the light of TEM and XPS analysis, we may infer that the nanocrystal is formed by NiSi2 and SiNX compound. Further, based on our electronic analysis, we can observe that the retention of NiSi2/SiNX compound Nanocrystal NVMs after 104 sec rises from 50% to 72% in comparison with the traditional one due of the quantum well band structure contributes by NiSi2 and SiNX compound nanocrystals. The retention of NiSi2/SiNX compound Nanocrystal NVMs after 104 sec is even better than the double layer without NH3 mixed one, 68%. Furthermore, the threshold voltage of NiSi2/SiNX compound Nanocrystal NVMs has not been subject to change after endurance with 104 programming and erasing cycles continuously.
Thus, by means of depositing nanocrystal charge trapping layer mixed with NH3 gas, we achieve the objective of simplifying the fabrication process. These fabrication techniques for the application of nonvolatile nanocrystal memory can also be applicable to the current manufacture process of the integrated circuit manufacture.

Contents
Chinese Abstract------------------------------------------------------------------I
English Abstract---------------------------------------------------------------III
Acknowledgement------------------------------------------------------------V
Contents-------------------------------------------------------------------------VII
Table Captions-----------------------------------------------------------------IX
Figure Captions---------------------------------------------------------------X
Chapter 1 Introduction
1.1 General Background---------------------------------------------------------------1
1.1.1 SONOS Nonvolatile Memory Devices-------------------------------------3
1.1.2 Nanocrystal Nonvolatile Memory Devices--------------------------------4
1.2 Motivation-------------------------------------------------------------------------10
1.3 Organization of This Thesis-----------------------------------------------------11

Chapter 2 Basic Principles of Nonvolatile Memory
2.1 Introduction------------------------------------------------------------------------14
2.2 Basic Program/Erase Mechanisms----------------------------------------------15
2.2.1 Energy band diagram during program and erase operation-----------15
2.2.2 Carrier injection mechanisms----------------------------------------------16
2.3 Basic Reliability of Nonvolatile Memory--------------------------------------21
2.3.1 Retention--------------------------------------------------------------------.21
2.3.2 Endurance--------------------------------------------------------------------22
2.4 Basic Physical Characteristic of Nanocrystal NVM--------------------------23
2.4.1 Quantum Confinement Effect---------------------------------------------23
2.4.2 Coulomb Blockade Effect--------------------------------------------------23
Chapter 3 Double-layer Nickel-silicide Nanocrystals for Nonvolatile Memory Application
3.1. Introduction------------------------------------------------------------------------35
3.2. Experiment-------------------------------------------------------------------------36
3.3. Results and discussion------------------------------------------------------------37
3.4. Conclusion-------------------------------------------------------------------------38

Chapter 4 Fabrication and Nonvolatile Memory Characteristics of NiSi/SiNX compound NCs (CNCs)
4.1. Introduction------------------------------------------------------------------------45
4.2. Experiment-------------------------------------------------------------------------46
4.3. Results and discussion------------------------------------------------------------47
4.4. Conclusion-------------------------------------------------------------------------48

Chapter 5 Conclusion------------------------------------------------------55
References-----------------------------------------------------------------------57

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