臺灣博碩士論文加值系統

本文針對電子遷移現象對覆晶錫球陣列封裝體中，錫球接點同時承受1*104 A/cm2電流密度及150℃環境溫度之孔洞生成模式及失效機制進行研究。測試對象包含4組錫球與2組基板，總共有8種錫球/基板的測試組合，以確認失效模式的一致性。並以保守型失效判定標準來定義及預測試片的失效電阻值，電子顯微鏡則用以進行接點微結構的即時（in situ）觀察與紀錄，以了解介金屬化合物（IMC）的生成與失效模式的種類。
結果顯示，所有試片的失效都發生於電子流由晶片端向下往基板端流動的接點之內，發生的原因都是沿著陰極晶片端錫球下層金屬（UBM）與錫球界面間的孔洞聚集，電子流由導線流入接點的轉角處皆為孔洞優先生成的位置，電流擁擠是造成此孔洞優先發生的原因。孔洞的詳細位置發生於2處，一為IMC/錫球界面，另一為UBM/IMC界面，此2種孔洞模式會同時出現在同一顆試片的不同錫球接點之內，混合型孔洞模式在此研究中並未被發現。由於錫球與IMC層內的原子擴散速率差異性，孔洞易生成於其接觸面間，1*104 A/cm2電流密度被發現可主導IMC/錫球界面間的孔洞生成模式；然而，位於UBM/IMC界面間的孔洞生成是起因於UBM層的消耗殆盡，因此，150℃環境溫度則被判定為主導UBM/IMC界面間的孔洞生成模式。錫球成分間的差異性對孔洞的生成模式及機制並無影響力。基於以上實驗結果的基礎數學模型則也被提及，以描述及了解孔洞的生成原因，但此模型則有需未來更多的實驗結果以提供參數來使計算結果更趨近於實際情況。
由其他結果亦觀察到，當錫球接點的電阻值達到初始阻值的120％之後，在電子流僅流經晶片端導線而未直接流入錫球接點時，錫球內原子可能會因晶片與基板間之溫度梯度而移動堆積於基板端以及隨電子流影響而移動堆積於電子流流出導線的另一端點。
由基板的差異性結果得知，搭配Cu/Ni/Au基板的錫球接點在受電子遷移測試之後，比搭配Cu-OSP基板的錫球接點更易於錫球/基板界面間生成孔洞。此結果顯示基板的搭配，可能使錫球/基板界面成為下一個承受電子遷移作用下導致失效的位置。

The effect of electromigration on void formation and the failure mechanism of FCBGA packages under a current density of 1*104 A/cm2 and an environmental temperature of 150℃ was investigated. Eight solder/substrate combinations of four lead-free solder systems with two substrates were examined to verify the failure modes. A conservative failure criterion was adopted to define and predict the failure of the package. SEM was employed to observe in situ microstructural changes, IMC growth, and failure modes.
All samples exhibited a similar failure, attributed mainly to void occupation along UBM/solder interfaces at the cathode chip side of the bumps with downward electron flow. Voids were initiated at the corner due to current crowding. Two specific void locations were identified at the IMC/solder and UBM/IMC interfaces, and they co-existed in the same specimen but in different bumps. No void coupling mode was found. Since the atom diffusion rate in the solder differs from that in the IMC layer, the voids can be formed between them. A current density of 1*104 A/cm2 was sufficiently high to form a void pattern at the IMC/solder interface. However, the formation of voids at the UBM/IMC interface is generally induced by the consumption of UBM, since the high temperature of 150℃ crucially dominates the void morphology at the UBM/IMC interface. The difference among solder systems did not affect the failure modes nor dominate mechanisms. Two theoretical models based on the experimental results were applied to describe the void formations. They will be more accurate and useful in understanding void formations by further experimental data provided.
According to the results of solder bumps with electrons only flowed through Al trace line at die side, it suggested that atoms transport toward the bottom substrate along with the temperature gradient and toward the right corners along with electron flow when electrons flowed through the trace after the resistances of solder joints reaching 120％ of their initial values.
With respect to the differences of substrate surface finishes, more voids appeared at the cathode substrate side of the solders combined with Cu/Ni/Au pad than those combined with Cu-OSP after long-term upward electron stressing. It suggested another possible failure at the substrate side when failure did not occur at the chip side in an EM test.

Table of Contents ……………………………………………………………………I
List of Tables ………………………………………………………………………IV
List of Figures ……………………………………………………………………...V
Abstract …………………………………………………………….………………X
摘要 ………………………………………………………………………….…...XII
Chapter 1 Introduction ……………………………………………………………...1
1.1 Prolog ………………………………………………………………………...1
1.2 Introduction of IC Packaging ………………………………………………...2
1.2.1 Introduction of Flip Chip Packaging Technology ……………………….4
1.3 The development in lead-free solder …………………………………………6
1.4 Reliability Test ……………………………………………………………….8
1.4.1 Introduction of Reliability ……………………………………………….8
1.4.2 Test Items of Reliability …………………………………………………9
1.5 Introduction of Electromigration ……………………………………………11
1.5.1 Acquirement of Effective charge ……………………………………….14
1.5.2 Current Crowding Effect ……………………………………………….15
1.5.3 Joule Heating Effect ……………………………………………………17
1.5.4 Back stress in electromigration ………………………………………...19
1.6 Electromigration in Flip Chip Solder Joints ………………………………...21
1.6.1 Current Density Threshold and Focus of Electromigration for the Flip Chip Solder Joint ……………………………………………………………..21
1.6.2 Current Crowding Effect in the Flip Chip Solder Joint ………………...22
1.6.3 Joule Heating Effect in the Flip Chip Solder Joint ……………………..23
1.6.4 Failure Modes and Mechanisms in the Flip Chip Solder Joint under EM Stressing ………………………………………………………………..25
1.7 Motivation and Briefly Related References Classification …………………27
1.8 Aim of this work ……………………………………………………………30
1.9 Organization and Content Index ……………………………………………30
Chapter 2 Experimental Setup ……………………………………………………..52
2.1 Sample ………………………………………………………………………52
2.2 Reflow and Cross-section …………………………………………………..52
2.3 Electromigration Test ……………………………………………………….53
2.4 Scanning Electron Microscope Observation ………………………………..54
2.5 Failure Definition …………………………………………………………...54
Chapter 3 Results ………………………………………………………………….60
3.1 Overview of Microstructural Change under EM Test ………………………60
3.2 Initiation and Formation of Voids …………………………………………..61
3.3 Specific Void Locations and the Failure Modes ……………………………61
3.4 Effect of Substrate Surface Finish Metallization on IMC Composition and Void Formation …………………………………………………………………...63
Chapter 4 Discussion ………………………………………………………………88
4.1 Effect of EM on Migration of Atoms and Current Crowding on Initiation and Formation of Voids …………………………………………………………88
4.2 Failure Modes and Mechanisms Induced by Current Density and Temperature ……………………………………………………………….89
4.3 Influence of the Ag-Cu Containing Ratio of Solder Systems upon Failure Modes ……………………………………………………………………….92
4.4 Introduction and Examination of Theoretical Models for Void Formations ..93
4.4.1 Model of Void Propagation along the IMC/solder Interface …………...93
4.4.2 Model of Void Propagation along the UBM/IMC Interface ……………96
4.4.3 Verification and Modification of Models for void formations …………98
4.5 Local Melting of Solder Joints before the Melting Failure Stage …………101
4.6 Effect of Substrate Surface Finish Metallization on Void Formation ……..102
4.7 Effect of EM and TM on atom migration in joints of current only flow through the trace line ……………………………………………………………….102
Chapter 5 Conclusion …………………………………………………………….113
Chapter 6 Future Work …………………………………………………………...116
References ………………………………………………………………………..117
Appendix A List of symbols and units …………………………………………128
Appendix B Nomenclature ……………………………………………………..129

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