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研究生:葉凱文
研究生(外文):Kai-Wen Yeh
論文名稱:應用於無線感測網路之微控制器設計
論文名稱(外文):Microcontroller Design for Wireless Sensor Network
指導教授:呂學士
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:97
語文別:英文
論文頁數:112
中文關鍵詞:微控制器系統單晶片無線感測網路低功耗設計流水線
外文關鍵詞:MicrocontrollerSystem on ChipWireless sensor networkLow power designPipeline
相關次數:
  • 被引用被引用:0
  • 點閱點閱:131
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  • 收藏至我的研究室書目清單書目收藏:1
在老齡化的社會中,遠端照護將會是未來的重要需求。隨著半導體製程技術
的進步,將數位電路、類比電路、以及高頻電路整合於系統單晶片中已經可行。
系統單晶片可使無線感測網路感測節點的單價以及體積大幅降低,可適用於遠端
照護之需求。
我們利用台積電0.35μm Mixed-signal 2P4M CMOS 製程完成了一應用於無線
感測節點之系統單晶片。其中包含了微控制器、類比數位轉換器、儀表放大器、
轉阻放大器、類比多工器、ASK 發射器、OOK 接收器、電壓調節器以及微控制器之
附屬電路包括石英震盪器和通電重置電路。整個晶片大小包含117 個ESD PAD 為3298*3637μm^2。
為了整合現有之資源例如編譯器,微控制器部分選擇相容於標準8051 指令集,
共有111 個指令。其核心部分為一五級流水線架構,可以達到每個核心時鐘周期
即執行一個指令。一個分支預測電路被用以增加流水線之性能。它包含4096 位元
組之程式記憶體,256 位元組之資料記憶體,7 個中斷源。另整合周邊電路包含兩
個擁有硬體循環冗餘校驗模組之通用非同步收發傳輸器、除頻器、計時器等。微
處理器之最高時脈為36MHz,最高性能為18MIPS。其功率消耗為1.172mA 當操作
於4MHz。
低功耗設計為感測節點之關鍵課題。數位電路部分我們利用時鍾門控電路技
術以及時鐘多工器來降低功耗。類比以及高頻電路部分則利用含開關之電壓調節
器來控制每一個區塊之電源開關,以達到降低功耗之目的。
Distance medical treatment will become an important issue in upcoming ageing
society. As a result of the advancement of semiconductor manufacturing technology, it
is possible to integrate wireless transceiver, sensors, amplifier and digital controller into
one single chip. This is called a SOC (System‐on‐Chip) chip. Hardware cost and size of a
WSN (Wireless Sensor Network) sensor node can be reduced substantially using SOC
technology and suitable for distance medical treatment.
We achieved a SOC chip for WSN sensor node using TSMC 0.35 μm Mixed‐signal
2P4M CMOS technology. It is composed of a microcontroller, an ADC (analog‐to‐digital
convertor), an Instrument Amplifier, a trans‐impedance amplifier, an analog multiplexer,
a ASK transmitter, an OOK receiver, 5 regulators, a crystal oscillator and power‐on‐reset
circuit. Size of the SOC chip including 117 ESD PADs is 3298*3637μm^2
The microcontroller is fully compatible with common 8051 MCUs. It has 111
instructions. The core of the microcontroller is pipeline architecture with 5‐stages. An
instruction can be executed in only one clock period. 4096 bytes program memory and
256 bytes data memory are embedded. Peripherals such as UART transceivers with
hardware CRC module, clock‐divider, and timer are also implemented. Maximum clock
frequency of the microcontroller is 36MHz (i.e. 18MIPS). Power consumption is
1.172mA when the chip operates at 4MHz.
Lower power design is a critical issue for WSN sensor node. Clock‐gating
technique and clock‐multiplexing are used to reduce power dissipation of digital
circuits. Regulators with switches are used to reduce power dissipation of analog and
RF circuits. Each analog / RF block can be turned on or off separately.
Chinese Abstract ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ I
English Abstract ‐‐‐‐‐‐‐‐‐‐‐‐‐-‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ III
List of Contents ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ V
Index of Figures ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐----------‐‐‐‐‐‐ IX
Index of Tables ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-----‐‐‐‐‐‐‐‐‐‐‐ XII

Chapter 1 Introduction ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 1
1.0 Motivation ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 1
1.1 Thesis Organization ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-‐‐‐‐‐‐‐‐‐‐‐ 3
1.2 References ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 4

Chapter 2 Mixed‐signal Circuit Design ‐‐‐‐‐‐‐‐‐‐‐‐ 5
2.0 Introduction ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐------------‐‐‐‐‐‐ 5
2.1 Mixed‐signal circuit design flow ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 6
2.2 Digital circuit low‐power design ‐‐‐‐‐‐‐‐‐---‐‐‐ 8
2.2.1 Pipelining and parallel processing ‐‐‐‐‐---‐‐‐ 9
2.2.2 Path balancing ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 10
2.2.3 Retiming ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐---------------‐‐‐‐‐‐ 11
2.2.4 Multiple supply voltages ‐‐‐‐‐‐---------‐‐‐‐‐ 12
2.2.5 Clock‐gating ‐‐‐‐‐‐‐‐‐--------------‐‐‐‐‐‐‐‐‐ 13
2.2.6 Power‐gating ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 14
2.3 References ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐---‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 16

Chapter 3 A Microcontroller for Wireless Sensor Node SOC ‐‐‐ 17
3.0 Introduction ‐‐‐‐‐‐‐‐‐‐‐-------------‐‐‐‐‐‐‐‐‐‐ 17
3.1 Microprocessor Core ‐‐‐‐‐‐‐‐‐‐‐‐--------‐‐‐‐‐‐ 19
3.1.1 IF stage ‐‐‐‐‐‐‐‐‐‐‐‐‐‐---------------‐‐‐‐‐‐‐‐‐ 23
3.1.2 ID stage ‐‐‐‐‐‐‐‐‐‐--------------‐‐‐‐‐‐‐‐‐‐‐‐‐ 25
3.1.3 RA stage ‐‐‐‐‐‐‐‐‐‐‐‐‐------‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 26
3.1.4 EX stage ‐‐‐‐‐‐‐‐‐------------------‐‐‐‐‐‐‐‐‐‐ 31
3.1.5 WB stage ‐‐‐‐‐‐‐‐‐‐-------------------‐‐‐‐‐‐‐ 35
3.1.6 Pipeline Controller ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 35
3.1.6.1 Structural Hazards ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 35
3.1.6.2 Data Hazards ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐---‐‐‐‐‐‐‐‐‐‐‐ 37
3.1.6.3 Control Hazards ‐‐‐‐‐‐‐‐‐‐---‐‐‐‐‐‐‐‐‐‐‐‐‐ 44
3.1.6.4 Special Cases ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 44
3.1.7 Branch Controller ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-‐‐‐‐‐‐‐‐‐‐‐ 45
3.1.8 Interrupt ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 52
3.2 Peripherals ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 54
3.2.1 Rom‐loader ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-------‐‐‐‐‐ 54
3.2.2 UART ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐-----‐‐‐‐‐‐‐‐ 56
3.2.3 Timer / Counter ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐------‐‐‐‐‐‐‐‐ 58
3.2.4 Clock‐divider ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 59
3.2.5 Power management (digital circuits) ‐‐‐‐‐‐‐ 60
3.3 References ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐---‐‐‐‐‐‐‐‐ 64

Chapter 4 A SOC for Wireless Sensor Node ‐‐‐‐‐‐ 65
4.0 Introduction ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐--‐‐‐‐‐ 65
4.1 Analog & RF circuits ‐‐‐‐‐‐‐‐‐‐‐‐--‐‐‐‐‐‐‐‐‐‐‐‐ 71
4.1.1 ASK transmitter ‐‐‐‐‐‐‐‐‐‐-----------------‐‐ 71
4.1.2 OOK receiver ‐‐‐‐‐‐‐--------------------‐‐‐‐‐ 73
4.1.3 Instrument Amplifier ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 74
4.1.4 Trans‐Impedance Amplifier ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 76
4.1.5 Voltage Regulator ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 77
4.1.6 Successive Approximation ADC ‐‐‐‐‐‐‐‐‐‐‐‐ 79
4.1.7 Analog Multiplexer ‐‐‐‐‐‐‐‐‐‐‐-----‐‐‐‐‐‐‐‐‐ 81
4.1.8 Crystal Oscillator ‐‐‐‐‐‐-------------------‐‐‐ 82
4.1.9 Power on Reset Circuit ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 83
4.2 Measurement for Microcontroller ‐‐‐‐‐‐‐‐‐‐‐‐ 84
4.2.1 PCB design ‐‐‐‐‐‐‐‐‐‐‐‐‐‐----------------‐‐‐‐ 86
4.2.2 Measurement setup and result ‐‐‐‐‐‐‐‐‐‐‐‐‐ 87
4.2.3 Specification Summary ‐‐‐-----‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 89
4.3 References ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 91
Chapter 5 Conclusion ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 93

Appendix A Detailed Descriptions of Special Function Registers ‐‐‐‐‐ 95
Appendix B An ASIC controller for Wireless Bio‐Sensor Network ‐‐‐‐‐‐ 99
Appendix C Related Patent Collection and Analysis ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ 107
[1.1] Warneke, B., and et al., Jan., 2001, "Smart Dust: Communicating with a Cubic-Millimeter Computer," IEEE-Computer, Vol. 34, no. 1, pp. 44-51.
[2.1] Keshab K. Parhi, “VLSI Digital Signal Processing Systems – Design and Implementation”, Wiley
[2.2] Low Power Management, http://www.apache-da.com
[2.3] Synopsys SolvNet Website, Documentation on the Web Version Z-2007.06, https://solvnet.synopsys.com
[3.1] Intel 8051, http://en.wikipedia.org/wiki/Intel_8051
[3.2] C51 Development Tools, http://www.keil.com/c51/
[3.3] National Chip Implementation Center, http://www.cic.otg.tw/
[3.4] David A. Patterson, John L. Hennessy, “Computer Organization and Design”,Morgan Kaufmann.
[3.5] I2C bus, http://www.i2c-bus.org/
[3.6] Claire Burguiere, Christine Rochange, Pascal Sainrat, “A Case for Static Branch Prediction in Real-Time Systems”, IEEE RTCSA, 2005
[3.7] Zhi-Cheng Chuang, “Microcontroller Design and Application for Wireless Bio-Sensor Network”, NTU MS. Thesis, 2007
[3.8] TI (Chipcon) CC1010 datasheet, http:// www.chipcon.com/
[3.9] Microchip 24LC128, http://www.microchip.com/
[3.10] EPCglobal Inc., "EPCTM Radio-Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for Communications at 860 MHz - 960 MHz Version 1.0.9". 2004.
[3.11] Rafey Mahmud, “Techniques to make clock switching glitch free”, EETimes, http://www.eetimes.
[3.12] Gurpur M. Prabhu, “COMPUTER ARCHITECTURE TUTORIAL”, http://www.cs.iastate.edu/~prabhu/Tutorial/title.html
[4.1] Zhi-Cheng Chuang, “Microcontroller Design and Application for Wireless Bio-Sensor Network”, NTU MS. Thesis, 2007
[4.2] Chih-Wei Tseng, “Wireless Bio-Medical Integrated Chip”, NTU MS. Thesis, 2006
[4.3] Yu-Pin Hsu, “A CMOS Low-noise Analog Front-End IC Design for Biomedical Applications”, NTU MS. Thesis, 2007
[4.4] GlobalCAD, Inc., http://www.gcadinc.com/index.html
[4.5] Prolific PL2303 datasheet, http://www.prolific.com.tw/eng/Products.asp?ID=59
[4.6] Advantech LAB TOOL 48-UXP datasheet, http://www.aec.com.tw/LT-48UXP-c.htm.
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