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研究生:鄭凱元
研究生(外文):Kai-Yuan Jheng
論文名稱:利用數位信號處理輔助之高功率效能無線發射機系統與架構設計
論文名稱(外文):DSP-Assisted Wireless Transmitter System and Architecture Designs for Power Efficiency Enhancement
指導教授:吳安宇吳安宇引用關係
學位類別:博士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
語文別:英文
論文頁數:101
中文關鍵詞:線性化功率放大器
外文關鍵詞:linear amplifier with nonlinear componentsLINCout-phasing techniquepower amplifier linearization
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一般來說,功率放大器(PA)是傳收機中最耗電的設備之一。因此,PA效率愈高,手機便可以使用愈久。功效和線性度是決定無線發射機性能的兩個關鍵參數。PA的線性度與功效必須有所取捨。也就是說,當我們得到較高的線性度,功效便降低。最近無線通訊系統採用先進的調變技術,以符合頻譜效率不斷增加的需求。使用這些複雜的調變和多載波造成包絡變化,迫使PA大幅回退工作以滿足無線通訊標準的線性度要求。然而,回退工作導致PA低效率。此外,類比/RF元件易受製成變異影響並使得發射機系統遭受非線性與失真問題。數位信號處理 (DSP)能比類比電路更準確地計算信號。如今已廣泛使用CMOS實現DSP得到相對較低的功耗和成本。
在此論文,我們研究前景看好的PA線性化技術LINC,可提供無線發射機高PA效率和高線性度。我們專注於設計低成本的DSP引擎以使用於LINC發射機。此外,為了提高功效,我們提出了兩種多階LINC發射機的設計,包絡調整多階LINC(EA-MLINC)和增益調整多階LINC(GA-MLINC)。最後,我們利用混合數位及類比信號模擬的電子設計自動化(EDA)工具先進設計系統(ADS)來驗證LINC發射機設計。根據模擬結果,3階EA-MLINC和3階GA-MLINC將一般LINC的附加功率效率(PAE)由16.5%分別提升到33.4%和23.6%,且都滿足寬頻分碼多工多重存取(WCDMA)規格的線性度要求。有別於傳統LINC使用單階縮放因素,我們提出的MLINC採用多階縮放因素將機率密度函數(PDF)劃分成若干區域。一些研究團隊已採用此設計理念來發展高效率的無線發射機。我們相信MLINC是個有效實現高效率的發射機的設計方向。
In general, the power amplifier (PA) is one of the most power-hungry devices in a tran-sceiver. Accordingly, the higher the PA efficiency, the longer the mobile handset de-vices can operate. Power efficiency and linearity are two key parameters to determine the performance of wireless transmitters. Linearity and power efficiency must be traded off in the PA. That is, we get more linearity while the power efficiency is decreased. Recent wireless communication systems adopt sophisticated modulation techniques such as 3π/8-shifted 8 PSK for EDGE, HPSK for WCDMA, and OFDM for WiMAX to achieve the increasing demand for spectrum efficiency. Using these complex modula-tions and multiple carriers causes envelope variations that force the PA to work at a large backoff to fulfill the linearity requirements of wireless communication standards. However, the operation under backoff leads to low PA efficiency. In addition, ana-log/RF devices suffer from process variation and often bring non-linearity and distortion into a transmitter system. DSP methods can perform more accurate computation of the signals than analog circuits. Nowadays, DSP is widely available at a relatively low power and cost in CMOS technology.
In this dissertation, we study a promising PA linearization technique, LInear am-plifier with Nonlinear Components (LINC), which offers both high PA efficiency and high linearity of wireless transmitters. We focus on the low-cost DSP engine design for a LINC transmitter architecture. Moreover, we propose two multilevel LINC transmitter designs, Envelope-Adjusting Multilevel LINC (EA-MLINC) and Gain-Adjusting Mul-tilevel LINC (GA-MLINC), for power efficiency enhancement. Finally, we utilize the mixed-mode EDA tool ADS to verify these LINC transmitter designs. According to the simulation results, the 3-level EA-MLINC and 3-level GA-MLINC enhance the con-ventional LINC system PAE from 16.5% to 33.4% and 23.6% respectively and both satisfy the linearity requirements of the WCDMA specifications. Instead of the tradi-tional LINC using single-level scaling factor, our proposed MLINC utilize multilevel scaling factors to divide the PDF into several regions. Some research groups have fol-lowed this design concept to develop high-efficiency wireless transmitters. We believe our MLINC designs are valid and effective directions to achieve high-efficiency trans-mitter designs.
Chapter 1 Introduction
1.1 Research Motivation 1
1.2 Research Background 2
1.2.1 Review of the Polar and LINC Wireless Transmitter Systems 2
1.3 Research Contributions 3
1.3.1 LINC Wireless Transmitter System and Architecture Design for
Cost Reduction 4
1.3.2 Multilevel LINC Wireless Transmitter System and Architecture
Design for Power Efficiency Enhancement 7
1.4 Dissertation Organization 10

Chapter 2 Review of Power Amplifier Linearization Techniques
2.1 Power Amplifier Characteristics 11
2.1.1 Ideal Linear Behavior 11
2.1.2 Square Law and Third Order Characteristic 12
2.1.3 Saleh Model 12
2.1.4 Varying Envelope and Constant Envelope Input Signals 14
2.2 Power Amplifier Linearization Techniques 15
2.2.1 Feedback Architecture 15
2.2.2 Feed-forward Architecture 16
2.2.3 Predistortion Architecture 17
2.2.4 Envelope Elimination Restoration 18
2.2.5 Linear Amplification with Nonlinear Components 20

Chapter 3 Review of Digital Signal Processing Techniques in LINC Wireless Transmitters
3.1 CORDIC 22
3.1.1 CORDIC Algorithm 22
3.1.2 CORDIC Architecture 25
3.2 Inverse Trigonometric Computation 31
3.2.1 Inverse Trigonometric Function 31
3.2.2 Inverse Trigonometric Computation Algorithm 32
3.3 Digital Phase Modulator 36
3.3.1 DDFS Theorem 36
3.3.2 Symmetric Property of Sine and Cosine Functions 38
3.3.3 Noise Analysis 39

Chapter 4 LINC Wireless Transmitter System and Architecture
Design for Cost Reduction
4.1 Rectangular-to-Polar Converter Design 42
4.1.1 Hardware Combining 42
4.1.2 Reduced Complexity Radix-2 Pipelined CORDIC 43
4.1.3 Comparison 47
4.2 Inverse Trigonometric Computation Module Design 48
4.2.1 Piecewise Polynomial Approximation Algorithm 48
4.2.2 Error Metrics of the Approximation 49
4.2.3 Approximation Algorithms 49
4.2.4 Proposed Inverse Cosine Module Architecture 52
4.3 Digital Phase Modulator Design 55
4.4 Simulation and Verification 59
4.4.1 WCDMA Transmitter Specifications 59
4.4.2 Transmitter Design Considerations 61
4.4.3 System Simulation Results 64
4.4.4 Implementation and Measurement Results 67
4.5 Summary 70
4.5.1 Rectangular-to-Polar Converter 70
4.5.2 Inverse Trigonometric Computation Module 71
4.5.3 Digital Phase Modulator 71

Chapter 5 Multilevel LINC Wireless Transmitter System and
Architecture Design for Power Efficiency Enhancement
5.1 Multilevel Out-Phasing Scheme 73
5.1.1 Multilevel Out-Phasing Scheme 73
5.1.2 Scaling Factor Set Determination 75
5.2 Multilevel Linearization Scheme 76
5.2.1 Linearity Condition 77
5.2.2 Envelope-Adjusting Technique 78
5.2.3 Gain-Adjusting Technique 78
5.3 Multilevel LINC Architecture Designs 79
5.3.1 Multilevel Signal Component Separator 79
5.3.2 Envelope-Adjusting MLINC 80
5.3.3 Gain-Adjusting MLINC 82
5.4 System Simulations 85
5.4.1 Combiner Efficiency 85
5.4.2 Linearity and Efficiency 87
5.5 Summary 94

Chapter 6 Conclusions and Future Work 96

Bibliography 98
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