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研究生:葉加榮
研究生(外文):Chia-Jung Yeh
論文名稱:具區塊記憶特性之渦輪碼
論文名稱(外文):InterBlock Memory for Turbo Coding
指導教授:林茂昭
學位類別:博士
校院名稱:國立臺灣大學
系所名稱:電信工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
語文別:英文
論文頁數:111
中文關鍵詞:渦輪碼編碼調變重覆性解碼多重天線輸出入
外文關鍵詞:Turbo codesturbo principlecoded modulationmultiple-input multiple-output(MIMO)Bell Labs Space-Time architecture (BLAST)space-time block code (STBC)
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在本篇論文中,我們研究如何在渦輪碼,渦輪編碼調變,渦輪編碼多重天線輸出入等系統中加入區塊間記憶,來產生區塊間隨機關聯性,以增進編解碼性能。同時針對所提出的具區塊間記憶特性之系統,我們也提出產生適當的非本質資訊轉換圖(EXIT Chart)的方法來分析解碼收斂行為。
首先我們研究具區塊記憶特性之二元渦輪碼,其編碼架構為在傳統渦輪碼後串接一個多工解訊器(demultiplexer)、多層次延遲處理器(multilevel delay processor)及訊號點對應器(signal mapper)。為了得到更好的解碼收斂行為,我們考慮相鄰區塊間之不同記憶程度來建構此二元渦輪碼,也就是傳統渦輪碼中只有部分的碼位元(code bits)經過延遲處理器及訊號點對應器。我們使用兩種次佳的解碼的方法,即在單個的碼句(codeword)內反覆的解碼方法(IDSC) 及在相鄰碼句間訊息傳遞之重覆性解碼演算法(IDAC)。研究成果顯示,在我們所探討的大部分情況下,我們所設計的具區塊間記憶特性之二元渦輪碼在AWGN通道下均優於傳統的二元渦輪碼。另外我們也研究將區塊間不同記憶程度的架構應用到渦輪碼編碼調變系統,跟傳統渦輪碼編碼調變作比較,我們也得到類似的好處。
最後我們在雷利衰退通道下(Rayleigh fading channel.)探討具區塊記憶特性之渦輪碼多重天線輸出入系統,首先我們探討渦輪編碼BLAST系統,其編碼架構為在傳統渦輪碼跟 BLAST 對應器中間加入一些延遲元件。我們除了探討系統的解碼收斂臨界值(Threshold)外,並提出第二種IDAC解碼方法。研究結果顯示,不像傳統的渦輪編碼BLAST系統,在所探討的渦輪編碼BLAST系統中,其解對應器的訊號偵測跟渦輪碼解碼器間的非本質資訊之交換曲線可以匹配的很好,因此,具區塊間記憶特性之渦輪編碼BLAST系統的除錯能力優於傳統渦輪編碼BLAST系統,尤其當我們使用重覆性偵測及重覆性解碼演算法,具區塊間記憶特性之渦輪編碼BLAST系統的性能相當接近Shannon極限。另外考慮著名的Alamouti空時編碼技術具有較低的訊號偵測複雜度,我們也將具區塊間記憶之渦輪碼編碼調變後串接Alamouti時空編碼,來設計兩根傳送一跟接收天線的空時渦輪碼系統,模擬結果顯示,藉由適當的設計訊號點對應方式及延遲元件,我們所提出的空時渦輪碼系統,無論在解碼收斂行為和位元錯誤率上均優於傳統空時渦輪碼系統。
In this thesis, we increase the correlation among code bits by providing connection between adjacent codewords of random-like block codes. First, we investigate the binary code T for which the encoding is implemented by serially concatenating a demultiplexer, a multilevel delay processor, and a signal mapper to the encoder of a binary turbo code C. The introduction of interblock memory in T can be viewed as adding extra checks to the bits of each codeword of C through the bits of adjacent codewords of C. To achieve improved convergence behavior through varying the percentage of checks provided by adjacent codewords, we construct TC which is obtained by passing only a fraction of C through the multilevel delay processor and the signal mapper. Two suboptimum decoding methods called iterative decoding within a single codeword (IDSC) and iterative decoding between adjacent codewords (IDAC) are used to decode TC. The cases of using the conventional binary turbo code and using the multiple turbo code with various S-random interleavers of various sizes have been investigated. For most of the cases we have investigated, we always ‾nd a binary TC which is better than the original C.

We also further investigate the performance of turbo coded modulation with interblock memory. Similar to the binary case, we vary the percentage of checks provided by adjacent codewords to achieve improved convergence behavior. Since the introduction of delay elements, the adjacent turbo codewords are correlated and we can use IDAC to improve the error performance by exchanging extrinsic information between adjacent turbo codewords. Similar advantage can be obtained.

In this thesis, we also apply the delay diversity scheme with block delay between the BLAST mapper and the binary turbo encoder of the turbo coded BLAST system. We show that the extrinsic information transfer (EXIT) curves of detector and turbo decoder in the proposed system can match well for the cases of Nt = 2 with Nr = 1 or 2. In this way, near-capacity thresholds can be obtained. To take advantage of the low detector complexity in Alamouti STBC (space-time block code), we also investigate a STBC system, which is the concatenation of the Alamouti STBC with a turbo trellis coded modulation. By using a proper labelling and adding a convolutional interleaver with block delay to such a STBC system, we achieve both lower error °oors and lower thresholds.
Contents
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Interblock Memory for Binary Turbo Coding . . . . . . . . . . . . . . . . . . 8
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Turbo Coding with Inter-Block Memory . . . . . . . . . . . . . . . . 10
2.2.1 Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.2 Distance property . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.3 Hybrid turbo coding with interblock memory . . . . . . . . . . 15
2.2.4 Iterative decoding within a single codeword . . . . . . . . . . 18
2.2.5 Iterative decoding between adjacent codewords . . . . . . . . . 19
2.3 Conventional Binary Turbo Coding with Interblock Memory . . . . . 20
2.3.1 Performance analysis . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.2 Comparison with conventional binary turbo codes . . . . . . . 35
2.3.3 ERect of the delay processor . . . . . . . . . . . . . . . . . . . 38
2.4 Multiple turbo coding with interblock memory . . . . . . . . . . . . . 40
2.5 Concluding remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3 Interblock Memory for Turbo Coded Modulation 47
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2 Turbo coded modulation with InterBlock Memory . . . . . . . . . . . 48
3.2.1 Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.2.2 Distance property . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2.3 Two speci‾c constructions . . . . . . . . . . . . . . . . . . . . 51
3.2.4 Hybrid turbo coded modulation with interblock memory . . . 52
3.3 Performance analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.3.1 BER for MA and MB with various S-random interleavers . . . 54
3.3.2 BER for MA and MB with various PIB . . . . . . . . . . . . . 57
3.3.3 BER results for short-to-moderate interleavers . . . . . . . . . 57
3.3.4 EXIT chart analysis for pinch-oR limits . . . . . . . . . . . . . 60
3.4 Concluding remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4 Interblock Memory for Turbo Coded Multiple-Antenna Systems 66
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.2 Conventional Turbo Coded BLAST System: . . . . . . . . . . . . 69
4.2.1 Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.2.2 Channel Model . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.2.3 MIMO Detector: MAP-based BLAST Demapper . . . . . . . 71
4.2.4 Iterative Detection and Decoding . . . . . . . . . . . . . . . . 72
4.2.5 EXIT Curves for BLAST Demapper and Turbo Decoder . . . 73
4.3 A Turbo Coded BLAST System with Near-Capacity Performance: 76
4.3.1 System Description . . . . . . . . . . . . . . . . . . . . . . . . 77
4.3.2 Iterative Decoding within a Single Codeword (IDSC) . . . . . 78
4.3.3 Demapper EXIT Curves . . . . . . . . . . . . . . . . . . . . . 79
4.3.4 Iterative Decoding between Adjacent Codewords (IDAC): IDAC-I and IDAC-II . 80
4.3.5 Thresholds for Various Detection-Decoding Algorithms . . . . 83
4.3.6 BER Results for Various Detection-Decoding Algorithms . . . 85
4.3.7 Extensions to Other MIMO Con‾gurations . . . . . . . . . . . 89
4.4 Turbo Coded OSTBC Systems with Improved Performance . . . . . . 91
4.4.1 Conventional turbo coded OSTBC system: . . . . . . . . . 91
4.4.2 Proposed turbo coded OSTBC system: ‥ . . . . . . . . . . . 96
4.5 Concluding remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5 Conclusions 100
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