臺灣博碩士論文加值系統

本論文的主旨是探討CMOS微型位移電容感測器之輸出電壓與電容改變量的關係，在實現CMOS位移電容感測器之佈局圖後，將此佈局圖下線並做出實體晶片，接著量測此晶片並分析各節點訊號，進一步討論內部元件運作情形是否正常。本晶片主要是用摺疊疊接式放大器做為主體，接著佈局離散元件，最後接上pad完成佈局圖，下線做出實體晶片後加以量測並改正。
本論文使用國家晶片系統設計中心(NSC Chip Implementation Center, CIC )所提供的台灣積體電路(TSMC)0.35微米 Mixed-Signal 2P4M Polycide3.3/5V的製程，並使用Synopsys公司出的Hspice電路模擬軟體與思源公司的laker軟體進行模擬及佈線。

The theme of the thesis is to discuss the relation of the output voltage and the variance of capacitance about CMOS displacement capacitive sensors. Design and completion of the layout is the first step of the procedure flow. According to the layout the IC is taped out. The last step is to measure and to analyze the signals from every nodes. Through the whole procedure flow, the components which are workable can be defined. This circuit is composed of folded-cascode amplifiers and dispersed elements. The chip can be measured after taping out the IC.
In this thesis, we apply 0.35 Mixed-Signal 2P4M Polycide 3.3/5V manufacture process of TSMC which is provided by NSC Chip Implementation Center. Finally, we use Hspice software designed by Synopsys co. to simulate and laker software designed by Springsoft co. to layout the circuit.

口試委員會審定書..................................................................................................i
誌謝...................................................................................................................ii
中文摘要...................................................................................................iii
英文摘要..............................................................................................................iv
目錄..................................................................................................................v
圖目錄............................................................................................................viii
表目錄..........................................................................................................xiii
第一章 導論.....................................................................................................1
1.1研究背景..............................................................................................................1
1.2研究動機..............................................................................................................2
1.3文獻回顧..............................................................................................................3
1.4本文目的與章節摘..............................................................................................9
第二章 環形陀螺儀其振動原理與分析....................................................................10
2.1環形陀螺儀之原理簡介....................................................................................10
2.2環形陀螺儀之感測原理.....................................................................................11
2.3環形陀螺儀架構與電容值的計算....................................................................12
2.4本論文之架構電容值估算................................................................................14
第三章 IC佈局設計流程簡介...................................................................................16
3.1 IC設計流程.......................................................................................................16
3.2佈局圖設計之考量要素....................................................................................18
第四章 系統架構與運算放大器佈局與模擬............................................................19
4.1本論文的架構與性能的模擬............................................................................19
4.2摺疊疊接式運算放大器主體............................................................................22
4.2.1摺疊疊接式運算放大器佈局.......................................................................24
4.3寬振幅常數互導偏壓電路................................................................................24
4.4電阻....................................................................................................................25
4.5摺疊疊接式放大器的特性模擬........................................................................29
4.5.1摺疊疊接式放大器之共模互斥比(CMRR) ................................................29
4.5.2電源互斥比(PSRR) ......................................................................................31
4.5.3相位邊界(Phase Margin) ..............................................................................32
4.5.4迴轉率(Slew Rate) .......................................................................................34
第五章 離散元件的佈局及模擬................................................................................36
5.1前言....................................................................................................................36
5.2互補式開關........................................................................................................36
5.3無穩態多諧振盪器............................................................................................37
5.4緩衝器(Buffer) ..................................................................................................42
5.5 S/H之時脈設計(Clock Design) ........................................................................44
5.6 MOS電阻的設計...............................................................................................47
5.7靜電防護pad (ESD pad) ...................................................................................49
5.8結論....................................................................................................................50
第六章 晶片及印刷電路板製作及量測流程............................................................51
6.1晶片設計與製作流程........................................................................................51
6.2印刷電路板設計與製作流程............................................................................54
6.3打線....................................................................................................................57
6.4量測....................................................................................................................59
第七章 量測與模擬結果比較....................................................................................62
7.1上端單一放大器之量測與模擬結果比較........................................................62
7.1.1方波產生器之模擬.......................................................................................63
7.1.2節點 模擬與量測的圖形比較.................................................................63
7.1.3節點 模擬與量 測的圖形比較...............................................................65
7.1.4節點 模擬與量測的圖形比較.............................................................67
7.1.5節點 模擬與量測的圖形比較............................................................69
7.1.6上端單一放大器總結論...............................................................................71
7.2下端單一放大器之模擬與量測結果比較........................................................72
7.2.1節點 模擬與量測的圖形比較.................................................................72
7.2.2節點 模擬與量測的圖形比較.................................................................74
7.2.3節點 模擬與量測的圖形比較.............................................................76
7.2.4節點 模擬與量測的圖形比較............................................................78
7.2.5下端單一放大器總結論...............................................................................80
7.3錯誤檢討及改正................................................................................................81
7.4緩衝器效能分析....................................................................................86
第八章 未來展望 ....................................................................................91
參考文獻...............................................................................................93
作者簡介.....................................................................................................95

1.楊龍杰 ,“認識微機電”, 滄海出版社
2.B.Mihang, W.Weiyuan, “Future of microelectromechanical systems(MEMS),” Sensors and Actuators, A56, pp.135-141, 1996.
3.M.A. LEMKIN et al, “A 3-axis force balanced accelerometer using a single proof-mass,” Solid State Sensors and Actuators, Vol. 2, pp.1185-1188, 1997.
4.Analog Device ADXL210 accelerometer datasheet. http://www.analog.com/pdf/ADXL202_10_b.pdf.
5.Navid Yazdi,Farrokh ayazi, and Khalil Najafi, “ Micromachined Inertial sensor” , Proc.of the IEEE.Aug.1998,pp1640-1659
6.B. E. Boser and R. T. Howe,“Surface MicromachinedAccelerometer ”, IEEE Journal of Solid-State Circuits, Vol. 31, pp.366-375, 1996.
7.M. Kraft, C. Lewis, T. Hesketh and S. Szymkowiak, “A novelmicromachined accelerometer capacitive interface”, Sensors and Actuators A68 ,pp. 466-473, 1998.
8.F.N. Alavi, M. Kraft and D.O. King, “ Sensitivity analysis of a high performance accelerometer”, Proc. Conf. on Micromechanics Europe,pp. 305-308, 2001.
9.Naiyavudhi Wongkomet, ”Position sensing for Electrostatic Micropositioners, Dept. of Electrical Engineering and Computer Sciences University of California,1998.
10.B. E. Boser and R. T. Howe, “Surface MicromachinedAccelerometer,” IEEE
Journal of Solid-State Circuits, Vol. 31, No. 3, 1996.
11.Bernhard E. Boser, ”Capacitive Position Sense Circuit”, Berkeley Sensor &
Actuator Center, Dept. of Electrical Engineering and Computer Sciences University
of California, 1996.
12.Bernhard E. Boser, ”Electronics for Micromachined Inertial Sensor”, Berkeley
Sensor & Actuator Center, Dept. of Electrical Engineering and Computer Sciences
University of California, 1997.
13.Zsolt Kádár, “ Integrated Resonant Magnetic Field Sensor,” Delft Univ., Ph.D.
Dissertation, 1997.
14.Naiyavudhi Wongkomet,”Position sensing for Electrostatic Micropositions,” Dept.
of Electrical Engineering and Computer Sciences University of California,1998.
15.鍾啟晨, “The design of micro-capacitive sensing circuit for inertial sensor,” 國立
清華大學微機電系統工程研究所,碩士論文,2003.
16.毛志強, “The Design, Simulation and Fabrication of Differential Capacitive
Sensing Circuits of Micro Gyroscope,” 國立交通大學電機與控制工程研究所,
碩士論文,2004.
17.陳世昌 , “位移電容感測器之研究設計”, 國立台灣大學應用力學研究所, 碩
士論文, 2006.
18.黃韋皓 , “電容感測電路之設計模擬與佈線”, 國立台灣大學應用力學研究所, 碩士論文, 2007.
19.Farrokh Ayazi, Khalil Najafi, “ A HARPSS Polysilicon Vibrating Ring Gyroscope”, IEEE Journal of MEMS, Vol. 10, No. 2, Jun 2001.
20.張家歐, 周傳心, 張簡文添, “微型陀螺儀研製(二),” 中山科學研究院委託合作研究計畫期末報告,2004.
21.陳世昌 , “位移電容感測器之研究設計”, 國立台灣大學應用力學研究所, 碩士論文, 2006.
22.CIC訓練課程 , “Full-Custom IC Design Concepts” , 國研院國家片系統設計中心.
23.Dan Clein,“CMOS IC Layout: Concepts, Methodologies, and Tools”, Newnes.
24. Johns Martin, ”Analog Integrated Circuit Design”, Wiley.
25. Alan Hastings,“The Art of Analog Layout”, Pearson International.
26.Behazd Razavi,“Design of Analog CMOS Integrated Circuits”, McGraw-Hill.