臺灣博碩士論文加值系統

本論文中以一種新穎的方法探討氟在低溫複晶矽薄膜電晶體中，驅入的容易度，以及對元件特性改善的效果；並對先前的技術做比較。
我們提出的方法是，使用CF4電漿來對元件的Buffer Layer做處理，讓氟能留在這層材質上；而在接下來沉積非晶矽(amorphous silicon, a-Si)做為通道層之後，氟能利用接著的熱處理來達到鈍化通道內的缺陷的效果，改善元件的特性。
不同於先前的技術直接的在通道層表面做處理，本論文探討的為另一個和通道層接觸的界面，也就是在通道層之下的Buffer Layer來做處理，希望能把CF4電漿處理所造成的損害減到最低，但還是能維持改善的效果以及元件的良率。

In this thesis, we develop a novel fabrication process to incorporate Fluorine ions with LTPS-TFTs. We use this process to discuss the difficulty of fluorine’s incorporating, the enhancement to device electrical characteristics; and compare this process with conventional ones.

Our process used the CF4 plasma treatment for the Buffer Layer, making fluorine ions incorporated into this film. Followed with the a-Si channel layer deposition, the Si-F bond was formed by the SPC process to passivate the defects in the channel film. Thus, the process can enhance the electrical characteristics of our device.

Differ from conventional techniques which treat the channel film directly, this thesis focused on the treatments on the Buffer Layer. We reduced the damage caused by the CF4 plasma. At the same time, the performance improvement was maintained.

論文摘要 I
Abstract II
圖目錄 V
表目錄 VII
第一章 序論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 論文大綱 3
第二章 薄膜電晶體的製作流程 5
第三章 CF4電漿處理後的薄膜性質 9
3.1 電漿的物理原理 9
3.2離子佈植的物理原理 10
3.3 CF4電漿對薄膜的影響分析 11
3.3.1 各種電漿功率對Buffer Oxide的蝕刻情況 11
3.3.2各種電漿功率對Buffer Oxide的表面粗糙度之影響 11
3.3.3 CF4電漿的時間及功率對氟驅入Buffer Oxide程度的影響 12
第四章 元件的電性結果與討論 24
4.1不同的電漿功率處理後之元件電性比較 24
4.1.1元件各項電性公式及結果分析 24
4.1.2活化能(Activation Energy) 27
4.2元件的穩定度測試 27
4.2.1 熱載子效應(Hot-Carrier Effect) 27
4.2.2 元件的劣化(Stress) 28
4.3 CF4電漿改善效果和多通道(multi-channel)薄膜電晶體的關係探討 29
4.3 阿摩尼亞電漿鈍化(NH3 plasma passivation) 31
第五章 結論與未來工作 56
參考文獻 57

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