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研究生:杜志輝
研究生(外文):Jhih-Huei Du
論文名稱:低電壓雙寬頻低雜訊放大器之設計
論文名稱(外文):Design of Low Voltage Dual-Wideband Low Noise Amplifier
指導教授:許孟庭
指導教授(外文):Meng-Ting Hsu
學位類別:碩士
校院名稱:國立雲林科技大學
系所名稱:電子與資訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
語文別:中文
論文頁數:90
中文關鍵詞:多閘級電晶體低電壓超寬頻低雜訊放大器
外文關鍵詞:Low noise amplifierLow voltageUltra wide-bandMultiple-gated transistors
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本論文主要是針對超寬頻(Ultra-wideband,UWB)與IEEE 802.11a 無線區域網路(WLAN)通訊規格設計進行研究與製作,利用台灣積體電路製造公司(TSMC)之0.18um製程技術,並實際量測驗證效能。
第一顆晶片吾人利用多閘級電晶體(Multi-gated transistors)的原理,設計一顆應用於IEEE 802.11a規範之低雜訊放大器,在5.8GHz下之量測結果,消耗功率為 mW,增益最大值約為9.4dB,輸入及輸出反射係數分別為-11dB和-12dB,雜訊指數為4.9dB,IIP3由-3dBm改善至+1dBm。
第二顆晶片吾人則是利用電流再利用(Current-Reused)和帶拒濾波器(Notch filter)的原理,設計一顆應用於UWB規範之低電壓雙寬頻低雜訊放大器,在5.6mW功率消耗下,增益最大值為15dB,輸入及輸出反射係數分別小於-10dB,隔離度大於-39dB,最低雜訊指數為5dB,IIP3為-7 dBm。
This thesis presents the research and implement on low noise amplifier for Ultra wide band and IEEE 802.11a WLAN。The chips are fabricated by TSMC 0.18um CMOS process. The efficiency of the circuit was demonstrated by measurement.
In first chip, I utilize the principle of Multiple-gated transistors to design a low noise amplifier for IEEE 802.11a application. Measurement results at 5.8GHz is shown that gain of 9.4dB, noise figure (NF) of 4.9dB, S11 of -11dB, and S22 of about -12dB with the DC power dissipation 5.6mW under 1.8V power supply. The IIP3 improvement is from -3dBm to 1dBm.
In second chip, we utilize the principle of current-reused and notch filter to design a low noise amplifier for UWB application. The minimum noise figure is 5 dB and maximum gain is 15dB from 3 to 12 GHz while drawing 5.6mW from a 1V supply voltage. The input and output return loss are both better than -10dB, isolation better than -39dB, respectively. The input third-order intercept point IIP3 is -7dBm.
中文摘要 I
英文摘要 II
誌謝 III
目錄 IV
表目錄 VI
圖目錄 VII

一、 序論 1
1.1 緒論 1
1.2 研究動機 2
1.3 論文組織 2
二、 射頻系統架構之基本理論 3
2.1 接收機架構之簡介 3
2.1.1 超外差接收機 4
2.1.2 直接降頻接收機 5
2.2 雜訊 6
2.2.1 熱雜訊 6
2.2.2 散彈雜訊 7
2.2.3 閃爍雜訊 7
2.2.4 電晶體的雜訊 9
2.3 低雜訊放大器基本參數 11
2.3.1 雜訊指數 11
2.3.2 增益 13
2.3.3 非線性效應 16
三、 IEEE 802.11a 低雜訊放大器設計 21
3.1 802.11a系統規格 21
3.2 802.11a低雜訊放大器設計 27
3.2.1 低雜訊放大器匹配網路架構 27
3.2.2 多閘級電晶體架構分析 29
3.2.3 低雜訊放大器設計 32
3.2.4 設計流程 37
3.3 電路佈局與模擬 38
3.3.1 電路佈局考量 38
3.3.2 模擬結果 40
3.4 量測結果 46
四、 低電壓雙寬頻低雜訊放大器設計 51
4.1 超寬頻系統規格 51
4.2 電路架構分析 53
4.2.1 放大器寬頻匹配分析 53
4.2.2 共閘級放大器雜訊分析 57
4.2.3 放大器增益分析 57
4.2.4 帶拒濾波器設計 61
4.3 電路設計 63
4.4 電路佈局與模擬 65
4.4.1 電路佈局考量 65
4.4.2 模擬結果 66
4.5 量測結果 72
五、 結果與討論 77
5.1 設計心得 77
5.2 結果與討論 78
5.2.1 WLAN低雜訊放大器結果與討論 78
5.2.2 Dual-Wideband 低雜訊放大器結果與討論 80
六、 結論與未來展望 82
6.1 結論 82
6.2 未來展望 82
參考文獻 83

附錄一 87
[1]B. Rezavi, RF Microelectronics. Prentice Hall, Upper Saddle River, NJ, 1998.
[2]謝俊南,” 設計5.7GHz低雜訊放大器應用於802.11a之研究”, 國立雲林科技大學電子與資訊工程研究所碩士論文, 中華民國九十二年六月。
[3]袁杰,”高頻電路分析與設計(二)”, 全威圖書有限公司。
[4] 梁嘉豪,” 應用於IEEE802.11a WLAN CMOS頻率合成器設計”, 中華大學電機工程學系碩士論文, 中華民國九十三年七月。
[5]許源佳,” 5.2GHz無線區域網路CMOS 低雜訊放大器之設計”國立暨南國際大學電機工程學系碩士論文, 中華民國九十二年六月七日。
[6]呂學士編譯, 本城何彥原著, “微波通訊半導體電路”, 全華科技股份有限公司, 2001。
[7]K. Chang, I. Bahl and V. nair, “RF and Microwave Circuit and Component Design for Wireless System”, A John Wiley & Sons, INC. 2002.
[8]T. H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuit”, Cambridge University Press, 1998.
[9]Guillermo Gonzalez,Microwave Transistor Amplifiers Analysis and Design,Prentice Hall Upper Saddle River,New Jersey, 1997.
[10]黃振洋”應用於無線區域網路與寬頻帶系統之低雜訊放大器設計”國立中央大學電機工程研究所碩士論文,中華民國九十四年六月。
[11]R. G. Arnold, C. C. Faulkner and D. J. Pedder, “Silicon MCM-D Technology for RF Integration”, IEEE Multichip Module Conference, p340~p344, 1997.
[12]“Information technology-telecommunication and information exchange between systems-local and metropolitan area networks- specific requirements- part 11: wireless LAN medium access control (MAC) and physical layer (PHY) specifications: higher-speed physical layer in the 5GHz band,” IEEE Std 802.11a, 1999.
[13]“Information technology-telecommunication and information exchange between systems-Local and metropolitan area networks- specific requirements- part 11: Wireless LAN medium access control (MAC) and physical layer (PHY) specifications: higher-speed physical layer extension in the 2.4GHz band, ”IEEE Std 802.11b, 1999.
[14]“Information technology-telecommunications and information exchange between systems- local and metropolitan area networks- specific requirements- part 11: Wireless LAN medium access control (MAC) and physical layer (PHY) specifications amendment 4: Further Higher Data Rate Extension in the 2.4 GHz Band,” IEEE Std 802.11g, 2003.
[15]蔡承樺, “無線區域網路CMOS 混頻晶片及雙頻三模收發模組之設計,” 國立中正大學電機工程研究所碩士論文, 2004。
[16]A. Doufexi, S. Armour, A. Nix and D. Bull, “A Comparison of HIPERLAN/2
and IEEE 802.11a Physical and MAC Layers”, Communications and Vehicular
Technology Symposium, 2000.
[17]D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier”,
IEEE Journal of Solid-State Circuits, vol. 32, no.5, pp. 745-759, May1997.
[18]Vladimir Aparin and Lawrence E. Larson, “Modified Derivative Superposition Method for Linearizing FET Low-Noise Amplifiers”, IEEE Transaction on Microwave Theory and Techniques, vol. 53, no. 2, pp. 571-581, February 2005.
[19]Hun Hung-Wei Chiu, Shey-Shi Lu, Yo-Sheng Lin,“ A 2.17-dB VF 5-GHz-Band Monolithic CMOS LNA With 10-mW DC Power Consumption,” IEEE Transaction on Microwave Theory and Techniques, vol.53, no.3, pp. 813-824, March 2005.
[20]Raja, M., Boon, T., Kumar, K., and Wong, S.,“ A fully integrated variable gain 5.75-GHz LNA with on chip active balun for WLAN”, IEEE Radio Frequency Integrated Circuit Symposium, pp. 439–442, 2003.
[21]Ren Chieh Liu, Chung Rung Lee, Huei Wang, and Chorng-Kuang Wang,” A 5.8-GHz Two-Stage High-Linearity Low-Voltage Low Noise Amplifier in a 0.35-um CMOS Technology”, IEEE Radio Frequency Integrated Circuits Symposium, pp. 221-224, 2002.
[22]Chong Yul Cha and Aang Gug Lee,”A 5.2-GHz LNA in 0.35-um CMOS Utilizing Inter-Stage Series Resonance and Optimizing the Substrate Resistance”, IEEE Journal of Solid-State, vol. 38, no. 4, pp. 669-672, April 2003.
[23]Saman Asgaran, M. Jamal Deen and Chih-Hung Chen, ” A 4-mW Monolithic CMOS LNA at 5.7 GHz With the Gate Resistance Used for Input Matching” Microwave and Wireless Components Letters, Volume 16, Issue 4, pp. 188- 190 ,April 2006.
[24]C. H. Liao and H. R. Chuang, “A 5.7 GHz 0.18 um CMOS gain-controlled differential LNA with current reuse for WLAN receiver,” IEEE Microwave Wireless Component Letter, vol. 13, no. 12, pp. 526–528, December 2003.
[25]李國瑞,” 應用於無線通訊寬頻低雜訊放大器之研究”, 雲林科技大學電子工程系碩士論文, 中華民國九十六年六月。
[26]G. Gusmai, M. Brandolini, P. Rossi, and F. Svelto, “A 0.18-μm CMOS Selective Receiver Front-End for UWB Applications”, IEEE Journal of Solid-State Circuit, vol.41, no.8, pp.1764-1771, August 2006.
[27]A. Bevilacqua, and A. M. Niknejad, “An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receivers” IEEE Journal of Solid-State Circuits, vol. 39, no 12, December 2004.
[28]R. M. Weng and P. C. Lin, “A 1.5V Low-Power Common-Gate Low Noise Amplifier For Ultra-wideband Receivers”, ISCAS, pp.2618 -2621, May 2007.
[29]Trung Kien Nguyen, Nam Jin Oh, Choong Yul Cha, Yong-Hun Oh, Gook-Ju Ihm, Sang-Gug Lee,” Image-Rejection CMOS Low-Noise Amplifier Design Optimization Techniques” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 2, February 2005.
[30]BI, P., ANH, D.,” Dual-mode tunable Q-enhanced filter for narrowband and UWB systems”, Canadian Conference on Electrical and Computer Engineering,pp. 2318-2321, 2006.
[31]Kenneth, A. T., Leonid B., James, W. H., John, N., “Ultra wideband front-end with tunable notch filter, IEEE North-East Workshop on Circuits and Systems, pp.177-180, 2006.
[32]Ro Min Weng, Ron Chi Kuo and Po Cheng Lin,” An Ultra-Wideband LNA with Notch Filter”, Radioelektronika, 2007 17th International Conference, April 2007.
[33]Che-Cheng Huang, Zhe-Yang Huang, Yen- Chun Wang, Yeh-Tai Huang and Meng-ping Chen,” 0.18μm CMOS Low-Noise Amplifier with two 2nd-order notch filter for Ultra-Wideband Wireless Receiver”, IEEE International Workshop on Radio Frequency Integrated Technology, December 2007.
[34]Yuan Gao, Yuanjin Zheng and Ban-Leong Ooi,” A 0.18μm CMOS UWB LNA with 5GHz Interference Rejection”, IEEE Radio Frequency Integrated Circuits Symposium, 2007.
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