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研究生:鄭育松
研究生(外文):Yu-Sung Cheng
論文名稱:使用CMOS積體電路設計之降壓式電源轉換器
論文名稱(外文):CMOS Integrated Buck Voltage Converter
指導教授:林永裁
指導教授(外文):Yeong-Tsair Lin
學位類別:碩士
校院名稱:龍華科技大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:中文
論文頁數:90
中文關鍵詞:低壓降線性穩壓器脈波寬度調變電路切換式電源轉換器能隙參考電路
外文關鍵詞:LDOBandgapPWMDC-DC Buck Converter
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本論文主要提出,能隙參考電路(Bandgap Reference Circuits)、低壓降線性穩壓器(Low Drop-out linear regulator, LDO)及切換式降壓型直流對直流電源轉換器(Switch-Mode Buck DC-DC Power Converters)三個主題來做討論。首先將探討能隙參考電路,用來實現一個具有穩定輸出而不受溫度影響之參考電壓電路。此外,還提出具有體積小、設計簡單、低價位、輸出漣波小之低壓降線性穩壓器以及應用於大電流負載、高效率、高抗雜訊之切換式降壓型直流對直流電源轉換器,以達到電子產品在使用單一電池下,其使用時間增加的目標。低壓降線性穩壓器電路架構主要由放大器電路、緩衝器、迴授電路所組成,而切換式降壓型直流對直流電源轉換器電路架構由補償器、脈波寬度調變電路(Pulse Width Modulation Circuit, PWM)、非重疊電路及緩衝電路所組成。在電源轉換器中,內部控制核心的脈波寬度調變電路,採用所提出的電壓架構模式之脈波寬度調變電路來控制整體電路的運作,然而此脈波寬度調變電路將具有定頻及寬範圍工作週期之特性。
本論文所設計製作之晶片,經HSPICE模擬,使用台積電點三五微米互補式金氧半製程來實現。低壓降線性穩壓器及切換式降壓型直流對直流電源轉換器工作電壓範圍均設在2V到5V,輸出電壓穩定在1.8V,轉換器之效率最高可達90%或以上。
In this thesis, a series of DC voltage regulators, such as Bandgap reference (BGR), Low dropout regulator (LDO) and DC-DC Buck Converter are developed. The BGR circuit is a low sensitivity to temperature and supply voltage. To increase the performances, an nMOS arrangement folded operational transconductance amplifier is developed for the BGR circuit. In addition, a small size, low cost and low ripple output voltage LDO regulator is introduced. Finally, in order to increase operating time of the battery powered devices, a high efficiency, high noise rejection Buck DC-DC Converter is also introduced. The LDO circuit consists of an error amplifier, buffer and feedback circuit, while the DC-DC Buck Converter circuit is composed of a frequency compensation circuit, PWM control circuit, non-overlapping circuit and pMOS power transistor. In the power converter, the PWM circuit included a ramp generator, a clock generator, a comparator, a clock generator and a flip-flop circuit. The clock generator provided a fixed frequency for the PWM controlled circuit. This PWM circuit generates a fixed-frequency and has a wide range controlled duty.
In this thesis, the proposed circuit, had simulated with TSMC 0.35μm 2P4M models, and had implemented with TSMC 0.35μm 2P4M process. The measurement results show that the output voltage of the LDO and DC-DC Buck Converter Operating voltage are ranging 2V to 5V and the output voltage is 1.8V. The maximum efficiency of DC converter is over 90 %.
摘要 i
ABSTRACT ii
誌謝 iii
目錄 iv
表目錄 vii
圖目錄 viii
第一章 緒論 1
1.1 相關研究發展與現況 1
1.2 研究動機與目的 3
1.3 論文內容架構 4
第二章 電源管理電路概論 5
2.1 能隙參考源 5
2.2 線性穩壓器 6
2.2.1 線性穩壓器之效率 6
2.3 切換式電源轉換器 7
2.3.1 切換式電源轉換器之效率 8
2.3.2 切換式電源轉換器分類 9
2.3.3 切換式電容轉換器 10
2.4 各項效能分析 11
2.4.1 負載暫態響應 11
2.4.2 輸出電壓差 13
2.4.3 線性調節率 14
2.4.4 負載調節率 15
2.4.5 輸出電壓漣波 16
2.4.6 等效串聯電阻 17
2.4.7 切換損失 18
2.5 與供應電源無關之偏壓 18
第三章 能隙參考電壓 21
3.1 負溫度係數電壓 21
3.2 正溫度係數電壓 22
3.3 能隙參考電壓電路設計原理 23
3.3.1 運算放大器偏移電壓與輸出阻抗 25
3.3.2 曲率較正 26
3.4 能隙參考電壓電路製作 27
3.4.1 運算放大器 28
3.4.2 能隙參考電壓電路 29
3.5 能隙參考電壓電路模擬結果 30
3.6 能隙參考電壓電路整體佈局 31
3.6.1 能隙參考電壓電路量測環境 32
3.6.2 能隙參考電壓電路量測結果 33
第四章 低壓降線性穩壓器 35
4.1 傳輸元件種類 35
4.2 誤差放大器電路分析 37
4.3 低壓降線性穩壓器整體電路等效小訊號分析 38
4.4 低壓降線性穩壓器模擬結果 41
4.5 低壓降線性穩壓器整體佈局 45
4.5.1 低壓降線性穩壓器量測環境 45
4.5.2 低壓降線性穩壓器量測結果 47
第五章 切換式降壓型直流對直流轉換器 52
5.1 降壓式之穩態分析 53
5.1.1 降壓式連續導通模式之穩態分析 53
5.1.2 降壓式不連續導通模式之穩態分析 57
5.1.3 降壓式連續與不連續導通模式之邊界 60
5.1.4 降壓式輸出電壓漣波分析 61
5.1.5 降壓式系統迴路穩定分析 62
5.2 切換式降壓型直流對直流轉換器電路設計 65
5.2.1 補償器 65
5.2.2 脈衝寬度調變電路 67
5.2.3 鋸齒波訊號產生器 69
5.2.4 遲滯比較器 70
5.2.5 數位訊號控制器 73
5.2.6 非重疊電路 74
5.2.7 緩衝電路 76
5.3 切換式降壓型直流對直流轉換器模擬結果 77
5.4 切換式降壓型直流對直流轉換器整體佈局 83
5.4.1 切換式降壓型直流對直流轉換器量測環境 83
5.4.2 切換式降壓型直流對直流轉換器模擬結果 85
第六章 結論與未來展望 86
6.1 結論 86
6.2 未來展望 86
參考文獻 87
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