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研究生:廖清泉
論文名稱:P-通道低溫多晶矽薄膜電晶體的元件電性與可靠度研究
論文名稱(外文):Electrical Properties and Reliability Studies of P-Channel LTPS-TFT Devices
指導教授:李憶興李憶興引用關係
學位類別:碩士
校院名稱:明新科技大學
系所名稱:光電科技產業研發碩士專班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:中文
論文頁數:70
中文關鍵詞:低溫多晶矽薄膜電晶體通道摻雜照光穩定度熱載子效應自發熱效應
外文關鍵詞:P-Type Low-Temperature Polycrystalline Silicon Thin-Film Transistors (LTPS-TFT)Channel DopingIllumination reliabilityHot carrier stressSelf-heating stress
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本論文提出低溫多晶矽薄膜電晶體P-TFT元件由摻雜B2H6製程之照光可靠度研究與直流偏壓穩定性的分析。在照光可靠度研究方面,當照光強度增加時,低溫多晶矽薄膜電晶體P-TFT元件的臨界電壓向正電壓偏移,C-V曲線將隨著臨界電壓向正電壓偏移。次臨界擺幅和關閉電流會增加。因為光子撞擊多晶矽通道,形成電子電洞對,電洞流向P-TFT元件的汲極,造成關閉電流增加,而多晶矽的晶粒邊界(Grain boundary)造成deep states捕捉電子,因此臨界電壓向正電壓偏移,而C-V曲線跟著臨界電壓向正電壓偏移。再比較P-TFT 摻雜B2H6與未摻雜B2H6的製程,也會發現摻雜B2H6的製程在照光後臨界電壓變化值,次臨界擺幅變化率,關閉電流變化率的變化值會比較大,因為摻雜製程,將硼摻雜在通道中,多晶矽的晶粒邊界(Grain boundary)造成deep states捕捉更多電子,臨界電壓更往正電壓偏移。
直流偏壓穩定性量測方面,我們進行了熱載子效應與自發熱效應測試。P-TFT元件在熱載子效應後,在汲極附近藉由撞擊離子所產生的電子電洞對,電子會被困在汲極介面附近的閘極氧化層,形成介面陷阱,造成關閉電流下降,而場效率遷移率會上升,其餘參數值變化不大;而CGD曲線因為在汲極介面附近的閘極氧化層,形成介面陷阱,因此造成曲線向上偏移,然而CGS曲線沒什麼變化;在自發熱效應後會產生高溫,使多晶矽薄膜釋放出氫氣,在汲極附近藉由撞擊離子所產生的電子電洞對,多晶矽晶界內部形成禁止能隙之陷阱能態(Trap states)與懸浮鍵(dangling bonds)捕捉電洞,形成deep states,因此臨界電壓向負電壓偏移,次臨界擺幅跟著變大,而場效遷移率及驅動電流會下降,而電子會被困在源極附近的氧化層/通道介面,而留下大量的介面陷阱。CGS曲線與CGD曲線因為上述所說的deep states,因此造成曲線向負電壓偏移;而CGS曲線因為電子被困在源極附近的氧化層/通道介面,而留下大量的介面陷阱,因此造成曲線向上偏移。結果顯示這兩種效應造成元件劣化的機制是不同的。另外,元件在直流偏壓後,熱載子效應與自發熱效應分別會在汲極與源極介面附近產生介面陷阱,分別使得偏壓後再照光的CGD曲線與CGS曲線更向上偏移。

This paper presents the illumination reliability and DC bias stability of P-TFT devices doped with B2H6 and un-doped with B2H6. Photo reliability results indicate that the threshold voltage (Vth), of the p-TFT device was shifted to positive values by increasing illumination intensity, and C-V curves will be in accordance with the Vth shift to positive voltage. Off current (Ioff) and sub-threshold swing (S.S.) of p-TFT devices were increased with increasing illumination intensity. The photons impacted with P-N junction, creating electron-hole pairs (EHPs) and contributing into the normal current, therefore Ioff was increased. By comparing devices’ channel doping processes with B2H6 or not, p-TFT devices doped with B2H6 had larger Vth shift, variations of S.S. and off current than those of the un-doped devices after illuminations. The reason why the doped p-TFT devices revealed much photo sensitivity is B2H6 dosage doping directly inside the channel of p-TFT grain boundaries creating deep states and capture electron caused larger Vth shift and worse device degradation.
The hot carrier stress and self-heating stress test p-TFT devices were carried out as a DC bias stability measurement. The hot carrier stress results show some electron-hole pairs would be generated by impact ionization near the drain and then electron got trapped in the gate oxide near the drain junction, formation of the interface traps, causing lower Ioff, and increasing field effect mobility. The CGD curve increases slightly when the gate voltage is smaller than the VFB while in the region the CGS curve almost remains the same. Hydrogen released from the p-TFT devices generating high temperature after self-heating stress, some electron-hole pairs would be generated by impact ionization near the drain and p-TFT grain boundaries creating trap states capture hole. Therefore, Vth values shift to negative voltage and S.S. values increases, whereas the field effect mobility (u) and drive current (Ion) decrease after the self-heating stress. Both of CGS and CGD curves will be in accordance with the Vth shift to negative voltage. However, electrons got trapped in the gate oxide near the source junction, and formation of the interface traps. The CGS curve increases slightly by the interface traps. Comparing with device degradation mechanisms after these two DC bias effects, the hot carrier effect and the self-heating effects generated the interface traps in the drain and the source junction, respectively, and causing the individual CGD curve and CGS curve increase slightly, then more upward shift after further illumination.

目 錄
摘 要 i
Abstract ii
誌 謝 iv
目 錄 v
表目錄 vii
圖目錄 viii
第一章 前言 1
1.1研究背景 1
1.2研究目的與動機 1
1.3論文架構 3
第二章 文獻回顧及原理 4
2.1 文獻回顧 4
2.2 I-V之相關參數 7
2.2.1臨界電壓(Threshold Voltage) 7
2.2.2次臨界擺幅(Sub-Threshold Swing, S.S.) 8
2.2.3場效遷移率(Field effect mobility) 8
2.2.4驅動電流Ion(-10V) 9
2.2.5關閉電流(Off-State Current), Ioff(-10V) 9
2.3電荷種類 9
2.3.1氧化層電荷對C-V圖的影響 10
2.3.2介面電荷對C-V圖的影響 11
2.4熱載子效應 12
2.5自發熱效應 12
第三章 實驗方法與步驟 13
3.1實驗架構 13
3.2元件之差異 14
3.2.1 元件製作 14
3.2.2 元件摻雜情況 15
3.3量測機台介紹 16
3.3.1 6” Manual Probe Station(六吋探針機座) 16
3.3.2 Agilent 4156C 16
3.3.3 Agilent 4284A 16
3.3.4 Agilent E5250A 17
3.3.5 USB 4000 微型光譜儀 17
3.4量測步驟 18
3.4.1 USB 4000使用方法 18
3.4.2二次離子質譜儀的操作原理 18
3.4.3量測步驟 21
3.4.4量測條件設定 22
3.4.5量測參數萃取 22
3.4.6元件種類 23
第四章 結果與討論 24
4.1 P-TFT基本電性 24
4.2照光可靠度分析 27
4.2.1 ID-VG 轉換曲線與參數萃取 29
4.2.2 CGS-VG與CGD-VG 曲線 33
4.2.3 ID-VD 特性曲線與JD shift分析 36
4.3直流電壓可靠度分析 40
4.3.1 熱載子效應(Hot carrier effect) 40
4.3.2 自發熱效應(Self-heating effect) 43
第五章 結論與未來展望 51
5.1結論 51
5.2未來展望 52
參考文獻 53

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