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研究生:許振嘉
研究生(外文):Chen-ChiaHsu
論文名稱:選擇性蝕刻於T型閘極高電子移動率電晶體之研製
論文名稱(外文):Study of T-Gate HEMTs by Selective Etching
指導教授:許渭州
指導教授(外文):Wei-Chou Hsu
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:英文
論文頁數:81
中文關鍵詞:高速元件選擇性蝕刻ITO/金T型閘極
外文關鍵詞:HEMTSelective etchingITO/AuT-gate
相關次數:
  • 被引用被引用:1
  • 點閱點閱:181
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  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
在本論文中,我們以ITO/Au的閘極結構,配合鹽酸的選擇性蝕刻,成功地縮短了有效閘極長度,因而提升了元件特性。使用ITO/Au的選擇性蝕刻製程是利用此兩種材料有極高的蝕刻選擇比,且鹽酸對砷化鎵的蝕刻速率極低,此技術亦可應用於氮化鎵系列的高電子移動率電晶體上。
當元件閘極製作完成後,利用鹽酸蝕刻ITO,因Au幾乎不受到酸的影響,導致Au下方的ITO長度有效地縮短。
本論文探討研製砷化鎵鋁/砷化銦鎵高電子移動率電晶體中以傳統的Au作為閘極,ITO/Au閘極,以及ITO/Au在選擇性蝕刻後形成T型閘極的元件特性。在室溫下,元件的直流與微波特性:飽和電流密度IDSS0為249(264/294) mA/mm,最大轉導值gm,max為155(149/172) mS/mm,臨限電壓Vth為1.8(1.85/1.8) V,電流增益截止頻率fT為16.08(16.1/21.4) GHz,最大震盪頻率fmax為27.06(26.1/30.1) GHz,附加功率效率P.A.E.為37.8(46) %,最小雜訊指數NFmin為0.81(1.24/1.18) dB。

In this work, we succeed in reducing effective gate length by utilizing HCl selective etching ITO/Au gate, and hence improve devices performance. Because of the high selectivity of HCl to ITO and Au and the low etching rate to GaAs, we choose these materials for the selective etching process. Besides, this process is adapted to GaN-based HEMTs.
We utilize HCl to etch ITO after we accomplish the gate process; Au will not be affected by hydrochloric acid, and that resulting in the reduced ITO length beneath Au.
In comparison, the performance of studied AlGaAs/InGaAs HEMTs with conventional Au gate, ITO/Au gate, and the T-gate etched by HCl have been investigated. And here are the DC and RF characteristics:the saturation current density IDSS0 249(264/294) mA/mm, the maximum extrinsic transconductance gm,max 155(149/172) mS/mm, the threshold voltage Vth 1.8(1.85/1.8) V, the unity current gain cut-off frequency fT 16.08(16.1/21.4) GHz, the maximum oscillation frequency fmax 27.06(26.1/30.1) GHz, the power added efficiency P.A.E. 37.8(46) %, and the minimum noise figure NFmin 0.81(1.24/1.18) dB at 300K.

Abstract (Chinese) Ⅰ
Abstract (English) Ⅲ
Acknowledgement Ⅴ
Contents Ⅵ
Figure Captions Ⅷ
Chapter 1 Introduction 1
Chapter 2 Material Growth and Fundamental 3
2-1 Pseudomorphic HEMTs 3
2-2 HEMT Layer Design 4
2-2-1 Cap Layer 4
2-2-2 Etching Stop Layer 5
2-2-3 Schottky Layer 5
2-2-4 δ-doped Carrier Supply Layer 5
2-2-5 Spacer Layer 6
2-2-6 Pseudomorphic InGaAs Channel Layer 6
2-2-7 Buffer Layer 7
2-3 Two-Dimensional Electron Gas 8
Chapter 3 Device Structure and Fabrication Processes 10
3-1 Device Structure 10
3-2 Device Fabrication Process 10
3-2-1 Sample Orienting 11
3-2-2 Mesa Isolation 11
3-2-3 Source and Drain Metallization 12
3-2-4 Gate Schottky Contact 13
3-2-5 T-Gate Fabrication 14
Chapter 4 Results and Discussion 15
4-1 Hall Measurement 15
4-2 DC Characteristics 16
4-2-1 Current-Voltage Characteristics 16
4-2-2 Extrinsic Transconductance Characteristics 17
4-2-3 Breakdown Voltage 19
4-2-4 Output Conductance 20
4-2-5 Thicknesses of ITO Film 21
4-3 Temperature-Dependent DC Characteristics 22
4-3-1 Current-Voltage Characteristics 22
4-3-2 Extrinsic Transconductance Characteristics 22
4-3-3 Breakdown Voltage 24
4-4 Microwave Characteristics 24
4-5 Power Characteristics 26
4-6 Noise Characteristics 27
4-7 Application for GaN-based HEMT 29
Chapter 5 Conclusion 30
References 31


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