臺灣博碩士論文加值系統

在本篇論文中，我們成功的製作出具有側閘極以及懸浮奈米線通道結構之新穎元件。利用邊襯蝕刻技術(sidewall spacer etching technique)以形成奈米線，同時，以去除犧牲氧化層之方式形成空氣介電層並使奈米線通道懸浮。因空氣介電層的存在，我們可利用調變閘極電壓使奈米線通道受靜電力吸引而擺動。同時，懸浮奈米線通道元件展現了較小的次臨界擺幅(相較於未去除犧牲氧化層之元件)，以及有趣的振盪現象。在本篇論文中，首次發表藉由奈米線通道擺動所引發之遲滯(hysteresis)現象。儘管大部份的元件未展現出非常陡峭的轉換特性(次臨界擺幅低於60mV/dec)，我們提出一漸進式吸引模型以解釋此一現象。

In this thesis, a novel device featuring a side-gate and suspended nanowire (NW) channels is proposed and demonstrated. The nanwire channels are formed with sidewall spacer etching technique, and become suspended by stripping the sacrificial oxide layer between the gate nitride and nanowire channels. The presence of air gap leads to a movable channel controlled by the gate bias. Despite a much larger equivalent oxide thickness due to the air gap, the suspended nanowire channel devices depict a better subthreshold swing over the devices without stripping the sacrificial oxide (i.e., no air gap). Moreover, an interesting oscillation phenomenon of suspended nanowire during the device operation is observed. The hysteresis phenomenon in the subthreshold characteristics due to the motion of the suspended nanowire is reported, for the first time, in this thesis. Nevertheless, most of the suspended nanowire devices do not show an abrupt turn-on behavior (i.e., with S.S. < 60mV/dec). A model considering the gradual contact of NW channel with the gate nitride is proposed to explain the operation principles of the fabricated devices.

Abstract (Chinese) I
Abstract (English) II
Acknowledgement IV
Contents V
Table Captions VII
Figure Captions VIII


Chapter 1 Introduction
1-1 Overview of Nanowire Technology 1
1-2 Low Subthreshold Swing Devices 3
1-2-1 Impact-Ionization MOS (I-MOS) 4
1-2-2 Tunneling FET (T-FET) 5
1-2-3 Suspended Gate MOSFET (SG-MOSFET) 6
1-3 Motivation 7
1-4 Organization of This Thesis 8

Chapter 2 Device Fabrication
2-1 Device Structure and Process Flow 9
2-2 Measurement Setup and Electrical Characterization 11
2-3 Operation Principle 12


Chapter 3 Results and Discussion
3-1 Leakage Current and Mechanisms 13
3-2 Basic Transfer Characteristics 15
3-3 Hysteresis Phenomenon 8
3-3-1 Characteristics of Hysteresis 18
3-3-2 Hysteresis Mechanism 21
3-4 The Suspended NW Channel TFTs with Larger Air Gap 23

Chapter 4 Conclusion and Future Work
4-1 Conclusion 25
4-2 Future Work 26

References 27
Tables 32
Figures 35

[1] D. J. Frank, R. H. Dennard, E. Nowak, P. M. Solomon, Y. Taur, and H. S. P. Wong, “Device Scaling Limits of Si MOSFETs and Their Application Dependencies,” Proc. IEEE , vol.89, pp. 259-281, 2001.
[2] F. L. Yang et al. “5nm-Gate Nanowire FinFET,” VLSI Symp. Tech. Dig. , pp. 196-197, 2004.
[3] X. Duan, Y. Huang, and C. M. Lieber, “Nonvolatile Memory and Programmable Logic from Molecule-Gated Nanowires,” Nano Lett., vol. 2, pp. 487-490, 2002.
[4] X. Duan, C. Niu, V. Sahi, J. Chen, J. W. Parce, S. Empedocles, and J. L. Goldman, “High-Performance Thin-Film Transistors Using Semiconductor Nanowires and Nanoribbons,” Nature, vol. 425, pp. 274-278, 2003.
[5] Y. Cui, Q. Wei, H. Park, and C. M. Lieber, “Nanowire Nanosensors for Highly Sensitive and Selective Detection of Biological and Chemical Species,” Science, vol. 293, pp. 1289-1292, 2001.
[6] Z. Li, Y. Chen, X. Li, T. I. Kamins, K. Nauka, and R. S. Williams, “Sequence-Specific Label-Free DNA Sensors Based on Silicon Nanowires,” Nano Lett., vol. 4, pp. 245-247, 2004.
[7] M. C. McAlpine, R. S. Friedman, S. Jin, K. H. Lin, W. U. Wang, and C. M. Lieber, “High-Performance Nanowire Electronics and Photonics on Glass and Plastic Substrates,” Nano Lett., vol. 3, pp. 1531-1535, 2003.
[8] M. D. Austin, H. Ge, W. Wu, M. Li, Z. Yu, D. Wasserman, S. A. Lyon, and S. Y. Chou, “Fabrication of 5 Nm Linewidth and 14 nm Pitch Features by Nanoimprint Lithography,” Appl. Phys. Lett., vol. 84, pp.5299-5301, 2004.
[9] Y. K. Choi, T. J. King, and C. Hu, “A Spacer Patterning Technology for Nanoscale CMOS,” IEEE Trans. Electron Devices, vol. 49, pp. 436-441, 2002.
[10] M. Law, J. Goldberger, and P. Yang, “Semiconductor Nanowires and Nanotubes,” Annu. Rev. Mater. Res., vol. 34, pp. 83-122, 2004.
[11]A. M. Morales and C. M. Lieber, “A laser Ablation Method for the Synthesis of Crystalline Semiconductor Nanowires,” Science, vol. 279, pp. 208-211, 1998.
[12]D. Wang, Q. Wang, A. Javey, R. Tu, H. Dai, H. Kim, P. McIntyre, T. Krishnamohan, and K. C. Saraswat, “Germanium Nanowire Field-Effect Transistors with SiO2 and High-κ HfO2 Gate Dielectrics,” Appl. Phys. Lett., vol.83, pp. 2432-2434, 2003.
[13]X. Duan, Y. Huang, Y. Cui, J. Wang, and C. M. Lieber, “Indium Phosphide Nanowires as Building Blocks for Nanoscale Electronic and Optoelectronic Devices,” Nature, vol. 409, pp.66-69, 2001.
[14]Y. Huang, X. Duan, Q. Wei, and C. M. Lieber, “Directed Assembly of One-Dimensional Nanostructures into Functional Networks,” Science, vol.291, pp. 630-633, 2001.
[15]A. Tao, F. Kim, C. Hess, J. Goldberger, R. He, Y. Sun, Y. Xia, and P. Yang, “Langmuir-Blodgett Silver Nanowire Monolayers for Molecular Sensing Using Surface-Enhanced Raman Spectroscopy,” Nano Lett., vol. 3, pp. 1229-1233, 2003.
[16]K. Gopalakrishnan, P. B. Griffin, and J. D. Plummer, “I-MOS: A Novel Semiconductor Device with a Subthreshold Slope Lower than kT/q,” IEDM Tech. Dig. , pp. 289–292, 2002.
[17]W. Y. Choi, J. Y. Song, J. D. Lee, Y. J. Park, and B. G. Park, “100-nm n-/p-channel I-MOS Using a Novel Self-Aligned Structure,” IEEE Electron Device Lett., vol. 26, no. 4, pp. 261–263, 2005.
[18]N. Abele, N. Fritschi, K. Boucart, F. Casset, P. Ancey, and A. M. Ionescu, “Suspended-Gate MOSFET: Bringing New MEMS Functionality into Solid-State MOS Transistor, ” IEDM Tech. Dig., pp. 479–481, 2005.
[19]P. F. Wang, K. Hilsenbeck, T. Nirschl, M. Oswald, C. Stepper, M. Weiss, D. Schmitt-Landsiedel, and W. Hansch, “Complementary Tunneling Transistor for Low Power Applications,” Solid State Electron., vol. 48, pp. 2281–2286, 2004.
[20]W. Y. Choi, J. Y. Song, J. D. Lee, Y. J. Park, and B. G. Park, “70-nm Impact-Ionization Metal–Oxide–Semiconductor (I-MOS) Devices Integrated with Tunneling Field-Effect Transistors (TFETs),” IEDM Tech. Dig., pp. 975–978, 2005.
[21] C. Shen, J. Q. Lin, E. H . Toh, K. F Chang, P. Bai, C. H. Heng, G.. S. Samudra, and Y. C. Yeo, ”On the Performance Limit of Impact-Ionization Transistors,” IEDM Tech. Dig., pp.117-120, 2007
[22] N. Abelé, A. Villaret, A. Gangadharaiah, C. Gabioud, P. Ancey, and A.M. Ionescu, “1T MEMS Memory Based on Suspended Gate MOSFET,” IEDM Tech. Dig., 2006.
[23] I. Eisele, and M. Zimmer, “Hybrid-gate Suspended Field-Effect Transistors for Gas-Sensing, “ Device Research Conference Digest, pp.113-116, 2002.
[24] H. Mahfoz-Kotb, A. C. Salaün, T. Mohammed-Brahim, and O. Bonnaud, “Air-Gap Polycrystalline Silicon Thin-Film Transistors for Fully Integrated Sensors,“ IEEE Electron Device Letters, vol. 24, pp. 165-167, 2003.
[25] F. Bendriaa, F. Le Bihan, A.C.Salaün, T. Mohammed-Brahim, O. Bonnaud, ” Suspended-Gate Polysilicon Thin Film Transistor as Generic Structure for Highly Sensitive Charged Ambience Sensors,” International Conference on Sensing Technology, pp. 128-132, 2005.
[26] H. C. Lin, M. H. Lee, C. J. Su, T. Y. Huang, C. C. Lee and Y. S. Yang, “A Simple and Low-Cost Method to Fabricate TFTs with Poly-Si Nanowire Channel,” IEEE Electron Device Lett., vol. 26, pp. 643-645, 2005.
[27] K. Akarvardar, C. Eggimann, D. Tsamados, Y. S. Chauhan,G. C. Wan, A. M. Ionescu, R. T. Howe, and H. S. Philip Wong, “Analytical Modeling of the Suspended-Gate FET and Design Insights for Low-Power Logic, ” IEEE Electron Devices, vol.55, pp. 48-59, 2008
[28] M. H. Lee, “A Study of Leakage Current and Reliability Issues in Poly- Si Thin-Film Transistors, ” Ph.D. dissertation, Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, 2006
[29] S. H. Kim, H. Kam, C. Hu, and T. J. King Liu, “Germanium-Source Tunnel Field Effect Transistors with Record High ION/IOFF,” Symposium on VLSl Technology Digest, pp. 178-179, 2009.
[30] H. C. Lin, C. H. Hung, W. C. Chen, Z. M. Lin, H. H. Hsu, and T. Y. Hunag, “Origin of Hysteresis in Current-Voltage Characteristics of Polycrystalline Silicon Thin-Film Transistors,” J. Appl. Phys, vol. 105,pp. 054502, 2009
[31] C. H. Kuo, H. C. Lin, G. J. Li, H. H. Hsu, C. J. Su, and T. Y. Huang “A Novel Thin-film Transistor with Suspended Nanowire Channels and Side-Gated Configuration,” accepted by Intl. Conf. on Solid State Device and Materials (SSDM) ,2009