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研究生:李時璟
研究生(外文):Lee, Shih-Ching
論文名稱:具不同應力及高介電層金氧半場效電晶體之可靠度研究
論文名稱(外文):The Reliability of Strain NMOSFETS With High-K Dielectric
指導教授:趙天生
指導教授(外文):Chao, Tien-Sheng
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子物理系所
學門:自然科學學門
學類:物理學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:英文
論文頁數:72
中文關鍵詞:高介電常數介電層熱載子效應臨界電壓不穩定性偏壓高溫不穩定可靠度
外文關鍵詞:high-k dielectricHC StressThreshold voltage instability(bias-temperature instabilityreliability
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本論文主要探討的是,以聚應力接觸孔蝕刻停止層之二氧化鉿為基底之高介電常數閘極介電層中的電荷捕捉與逃逸之各種不同的電特性分析。與傳統的二氧化矽(SiO2)或氮氧化矽(SiON)閘極氧化層不同的是,以二氧化鉿為基底之高介電常數閘極介電層具有相當嚴重的可靠度問題—臨界電壓的不穩定性,起因於早已存在的主體缺陷中的快速與緩慢的電荷捕捉與逃逸現象,特別是對於處在矽基底電子注射狀態下的N 型金氧半場效電晶體而言。我們發現,在偏壓高溫不穩定性(bias-temperature instability, BTI)應力測試的應力/量測循環之中,這些被捕捉的電荷載子將導致半導體元件中臨界電壓的偏移、汲極電流的衰減,以及通道載子移動率的變異。同時我們也改變不同偏壓電壓、偏壓時間、偏壓溫度…等,對這些被捕捉的電荷載子將導致半導體元件中臨界電壓的偏移、汲極電流的衰減,以及通道載子移動率的變異作更深入的探討,同時我們也做Channel Hot Carrier stress的量測和探討,來了解在Channel Hot Carrier stress下,以聚應力接觸孔蝕刻停止層之二氧化鉿為基底之高介電常數閘極介電層中的電荷捕捉與逃逸之各種不同的電特性分析。同時我們也使用Pulse IV 來進行直流電性和可靠度量測的探討,藉此將fast transient charge effect的效應做出分析和探討
This dissertation majorly studies the charge trapping and de-trapping in Hf-based high-k gate dielectrics with different contacting etching stopping layer thickness through various electrical characterizations under changing different stress condition. Unlike the conventional SiO2 or SiON gate oxides, Hf-based high-k gate dielectrics are known to suffer from the serious reliability concern of threshold voltage instability due to the fast and slow charge trapping and de-trapping in the pre-existing bulk traps in Hf-based high-k gate dielectric, especially under the substrate electron injection conditions in high-k NMOSFETs. However, these trapped charge carriers are believed to cause the threshold voltage shift, drain current degradation, and channel mobility variation during the stress/measure cycles of bias temperature instability (BTI) stress. In the meantime, we still carry out hot carrier stress for studying the charge trapping and de-trapping in Hf-based high-k gate dielectric with different contacting etching stopping layer thickness through various electrical characterizations under changing different stress condition. We also utilize pulse iv to measurement and analyze the performance and reliability compared with DC measurement.
Contents
Abstract (Chinese)………………………………………...……………………….......I
Abstract (English)………………………………………….…………...………….....II
Acknowledgements (Chinese)……….……………..………………………….…….III
Contents……………………………………………….…..………………………....IVContents
Abstract (Chinese)………………………………………...………………………....VI
Abstract (English)………………………………………….…………...…………...IV
Acknowledgements (Chinese)……….……………..………………………….……..V
Contents……………………………………………….…..………………………....VI
Figure Caption…………………………………….……………..………………. VI
Chapter 1 Introduction
1.1 History of high-k Materials……………………………………………………...1
1.2 History of strain engineer………………….....…..………………………….......7
1.4 Motivation of this work………………….....…..…………………………...……9
Chapter2 Device fabrication and measurement equipment
2.1 Device fabrication…………………………………………………….................19
2.2 measurement equipment………………………………………………………..22
Chapter3 Result and discussion
3.1 Positive bias temperature instability (PBTI)………………………………….27
3.2 Channel hot electron stress (CHE)…………………………………………….33
VII
3.3 Pulse IV measurement………………………………………………………….36
Chapter 4 Summary & Conclusion
4.1 Summary of Positive bias temperature instability (PBTI)…………………...60
4.2 Summary of Channel hot electron stress………………………………………62
4.3 Summary of Pulse IV
measurement…………………………………………...64
Chapter 1
[1.1] http://www.itrs.net/
[1.2] THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS EXECUTIVE SUMMARY, p. 68, 2007
[1.3] PROCESS INTEGRATION, DEVICES, AND STRUCTURES, p.p. 29, 2007
[1.4] K. ROY, S. MUKHOPADHYAY, H. M. MEIMAND, ─Leakage Current Mechanisms and Leakage Reduction Techniques in Deep Submicrometer CMOS Circuits∥, PROCEEDINGS OF THE IEEE, VOL. 91, NO. 2, pp. 305-327, 2003
[1.5] G. D. Wilka, R. M. Wallaceb, J. M. Anthony, "High-k gate dielectrics: Current status and materials properties considerations∥, Journal of Applied Physics, Volume 89, pp. 5243-5275, 2003
[1.6] T. Skotnicki, C. F. Beranger, C. Gallon, F. Boeuf, S. Monfray, F. Payet, A. Pouydebasque, M. Szczap, A. Farcy, F. Arnaud, S. Clerc, M. Sellier, A. Cathignol, J. P. Schoellkopf, E. Perea, R. Ferrant, H. Mingam, ─Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 1, pp. 96-130, 2008
[1.7] C. H. Chien, 元件技術原理及可靠度分析講義
[1.8] 林宏年,呂嘉育,林鴻志,黃調元, ∥ 局部與全面形變矽通道(strained Si channel) 互補式金氧半(CMOS) 之材料、製程與元件特性分∥, 奈米通訊, 第十二卷第一期, 2005
[1.9] S. E. Thompson, M. Armstrong, C. Auth, M. Alavi, M. Buehler, R. Chau, S. Cea, T. Ghani, G. Glass, T. Hoffman, C. H. Jan, C. Kenyon, J. Klaus, K. Kuhn, Z. Ma, B. Mcintyre, K. Mistry, Member, IEEE, A. Murthy, B. Obradovic, R. Nagisetty, P. Nguyen, S. Sivakumar, R. Shaheed, L. Shifren, B. Tufts, S. Tyagi, M. Bohr, Y. E. Mansy, “A 90-nm Logic Technology Featuring Strained -Silicon
71
”, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 11, pp. 1790-1787, 2004
[1.10] A.Oishi, Fujii, T.Yokoyama, K.Ota, T.Sanuki, H.Inokuma, K.Eda, T.Idaka, H.Miyajima, S.Iwasa, H.Yamasaki, K.Oouchi, K.Matsuo, H.Nagano, T.Komoda, Y.Okayama, T.Matsumoto, K.Fukasaku, T.Shimizu, K.Miyano, T.Suzuki, K.Yahashi, A.Horiuchi, Y.Takegawa, K.Saki, S.Mori, K.Ohno, I.Mizushima, M.Saito, M.Iwai, S.Yamada, N.Nagashima, F.Matsuoka, ─High Performance CMOSFET Technology for 45nm Generation and Scalability of Stress-Induced Mobility Enhancement Technique∥, IEIC Technical Report, VOL.105;NO.541, pp. 17-20, 2006
[1.11] K. J. Hubbard, D. G. Schlom, ─Thermodynamic stability of binary oxides in contact with silicon∥, J. Mater. Res., Vol. 11, No. 11, pp. 2757-2776, 1996
Chapter 2
[2.1] Model 4200-SCS Semiconductor Characterization System Reference Manual, 2008
[2.2] Model 4200-PIV Measurements, 2006
[2.3] D. Heh, R. Choi, C. D. Young, and G. Bersuker, ─Fast and slow charge trapping/detrapping processes in high-k nMOSFETs∥, IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 2, pp. 180-182, 2008
Chapter 3
[3.1] C. W. Liu, S. Maikap, C.-Y. Yu, ∥Mobility Enhancement Technologies∥, IEEE CIRCUITS & DEVICES MAGAZINE, pp. 21-36, 2005
[3.2] R. Choi, C. Young, C. Y. Kang, D. Heh, G. Bersuker, S. Krishnan, P. Kirsch, A. Neugroschel, S.C. Song, B. H. Lee, R. Jammy, ∥ Reliability Assessment on Highly Manufacturable MOSFETs with Metal Gate and Hf based Gate Dielectrics∥, Proceedings of 14th IPFA, pp. 26-29, 2007
[3.3] D. Heh, R. Choi, C. D. Young, and G. Bersuker, ─Fast and slow charge
72
trapping/detrapping processes in high-k nMOSFETs∥, IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 2, pp. 180-182, 2008
[3.4] G. Bersuker, G. Bersuker, J. H. Sim, C. S. Park, C. D. Young, S. Nadkarni, R. Choi, and B. H. Lee, ─INTRINSIC THRESHOLD VOLTAGE INSTABILITY OF THE HFO2 NMOS TRANSISTORS∥, International Reliability Physics Symposium,
pp. 179-184, 2006
[3.5] G. Bersuker, G. Bersuker,a_ P. Zeitzoff, J. H. Sim, B. H. Lee, R. Choi, G. Brown, and C. D. Young, ─Mobility evaluation in transistors with charge-trapping gate dielectrics∥, APPLIED PHYSICS LETTERS, VOL 87, pp. 042905, 2005
[3.6] C. D. Young, P. Zeitzoff, A. Brown, G. Bersuker, B. H. Lee, J. R. Hauser, ─Intrinsic Mobility Evaluation of High-k Gate Dielectric Transistors Using Pulsed Id–Vg∥, IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 8, pp. 586-588, 2005
[3.7] S. Zafar, A. Callegari, E. Gusev, M. V. Fischetti, ─Charge trapping related threshold voltage instabilities in high permittivity gate dielectric stacks∥, JOURNAL OF APPLIED PHYSICS VOLUME 93, NUMBER 11, pp. 9298-9305, 2003
[3.8] M. Jo, H. Park, M. Chang, H. S. Jung, J. H. Lee, H. Hwang, ─Oxygen vacancy induced charge trapping and positive bias temperature instability in HfO2 nMOSFET∥, Microelectronic Engineering, VOL 84, pp. 1934–1937,2007
[3.9] D. Heh, M. Jo, H. Park, M. Chang, H. S. Jung, Jong-Ho Lee b, and Hyunsang Hwanga, ─A Novel Bias Temperature Instability Characterization Methodology for High-k nMOSFETs∥, IEEE ELECTRON DEVICE LETTERS, VOL. 27, NO. 10, pp. 849-851, 2006
[3.10] S. Zafar, A. Callegari, E. Gusev, M. V. Fischetti, ─Charge Trapping in High K Gate Dielectric Stacks∥, IEEE IEDM, pp. 517-520, 2002
[3.11] G. Ribes, J. Mitard, M. Denais, S. Bruyere, F. Monsieur, C. Parthasarathy, E. Vincent, and G. Ghibaudo, ─Review on High-k Dielectrics Reliability Issues∥, IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 5, NO. 1, pp. 5-19, 2005
73
[3.12] A. T. JSrishnan, V. R. and S. Krishnan, ─Impact of Charging Damage on Negative Bias Temperature Instability∥, IEEE IEDM, pp. 39.3.1 - 39.3.4, 2001
[3.13] C. Y. Chen, J. W. Lee, S. D. Wang, M. S. Shieh, P. H. Lee, W. C. Chen, H. Y. Lin, K. L. Yeh, and T. F. Lei, ─Negative Bias Temperature Instability in Low -Temperature Polycrystalline Silicon Thin-Film Transistors∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 12, pp. 2993- 3000, 2006
[3.14] N. A. Chowdhury, D. Misra, ─Charge Trapping at Deep States in Hf–Silicate Based High-k Gate Dielectrics∥, Journal of The Electrochemical Society, VOL 154, pp. 30-37, 2007
[3.15] K. Xiong, J. Robertson, and S. J. Clark, ─Defect energy states in high-K gate oxides∥, phys. stat. sol, VOL 243, No. 9, pp. 2071–2080, 2007
[3.16] J. L. Gavartin, B. H. Lee, ─Negative oxygen vacancies in HfO2 as charge traps in high-k stacks∥, APPLIED PHYSICS LETTERS, VOL 89, pp. 082908, 2006
[3.17] K. Xiong, Y. Du, K. Tse and J. Robertsona, ─Defect states in the High
-dielectric-constant gate oxide HfSiO4∥, JOURNAL OF APPLIED PHYSICS, VOL 101, pp. 024101, 2007
[3.18] C.Shen, M.F.Li, X.P. Wang, H. Y. Yu, Y. P. Feng, A. T.-L. Lim, Y.C.Yeo, D.S.H.Chan, D.L.Kwong, ─Negative U Traps in HfO2 Gate Dielectrics and Frequency Dependence of Dynamic BTI in MOSFETs∥, IEEE IEDM, 2004
[3.19] G. Bersuker, P. Zeitzoff, G. Brown, and H. R. Huff, ─Dielectrics of the future transistors∥, Materialstoday, Volume 7, Issue 1, pp. 26-33, 2004
[3.20] K. Xiong, J. Robertsona, S. J. Clark, ─Passivation of oxygen vacancy states in HfO2 by nitrogen∥, JOURNAL OF APPLIED PHYSICS, VOL 99, pp. 044105, 2006
[3.21] H. C. Wen, H. R. Harris, C. D. Young, H. Luan, H. N. Alshareef, K. Choi, D. L. Kwong, P. Majhi, G. Bersuker, B. H. Lee,, ─On Oxygen Deficiency and Fast Transient Charge-Trapping Effects in High-k Dielectrics∥, IEEE ELECTRON DEVICE
74
LETTERS, VOL. 27, NO. 12, pp. 984-987, 2006
[3.22] K. T. Lee, C. Y. Kang, O. S. Yoo, R. Choi, B. H. Lee, J. C. Lee, H. D. Lee, Y. H. Jeong, ─PBTI-Associated High-Temperature Hot Carrier Degradation of nMOSFETs With Metal-Gate/High-k Dielectrics∥, IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 4, pp. 389-391, 2008
[3.23] I. S. JEON, J. PARK, D. EOM, C. S. HWANG, H. J. KIM, C. J. PARK, H. Y. CHO, J. H. LEE, N. I. LEE, H, K. KANG, ─Post-Annealing Effects on Fixed Charge and Slow/Fast Interface States of TiN/Al2O3/p-Si Metal–Oxide–Semiconductor Capacitor∥, Jpn. J. Appl. Phys. Vol. 42, pp. 1222-1226, 2003
[3.24] K. H. Allers, ─Prediction of dielectric reliability from I–V characteristics: Poole–Frenkel conduction mechanism leading to pE model for silicon nitride MIM capacitor∥, Microelectronics Reliability, VOL 44, pp. 411–423, 2004
[3.25] J. L. Gavartina, A. L. Shluger, A. S. Foster, G. I. Bersuker, ─The role of nitrogen-related defects in high-k dielectric oxides: Density-functional studies∥, JOURNAL OF APPLIED PHYSICS, VOL 97, pp. 053704, 2005
[3.26] C. Y. Kanga, J. C. Lee, R. Choi, S. C. Song, C. D. Young, G. Bersuker, and B. H. Lee, ─Transient bicarrier response in high-k dielectrics and its impact on transient charge effects in high-k complementary metal oxide semiconductor devices∥, APPLIED PHYSICS LETTERS, VOL 88, pp. 162905, 2006
[3.27] Y. H. Kim, J. C. Lee, ─Reliability characteristics of high-k dielectrics∥,
Microelectronics Reliability, VOL 44, pp. 183–193, 2004
[3.28] S. Zhu, A. Nakajimaa, ─Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics∥, APPLIED PHYSICS LETTERS, VOL 91, pp. 033501, 2007
[3.29] C. D. Young, D. Heh, S. V. Nadkarni, R. Choi, J. J. Peterson, J. Barnett, B. H. Lee, G. Bersuker, ─Electron Trap Generation in High-κ Gate Stacks by Constant
75
Voltage Stress∥, IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 6, NO. 2, pp. 123-131, 2006
[3.30] F. Crupi, C. Pacea, G. Cocorulloa, G. Groesenekenb,c, M. Aoulaicheb,
M. Houssa, ─Positive Bias Temperature Instability in nMOSFETs with
ultra-thin Hf-silicate gate dielectrics∥, Microelectronic Engineering, VOL 80, pp. 130–133, 2005
[3.31] N. Sa, J. F. Kang, F. Kang, H. Yang, X. Y. Liu, Y. D. He, R. Q. Han, C. Ren, H. Y. Yu, D. S. H. Chan, D.-L. Kwong, ─Mechanism of Positive-Bias Temperature Instability in Sub-1-nm TaN/HfN/HfO2 Gate Stack With Low Preexisting Traps∥, IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 9, pp. 610-612, 2005
[3.32] C. D. Young, D. Heh, A. Neugroschel, R. Choi, B. H. Lee, G. Bersuker, ─Electrical characterization and analysis techniques for the high-k∥, Microelectronics Reliability, VOL 47, pp. 479–488, 2007
[3.33] T. Wang, C. T. Chan, C. J. Tang, C. J. Tang, H. C.-H. Wang, M. H. Chi, D. D. Tang, ─A Novel Transient Characterization Technique to Investigate Trap Properties in HfSiON Gate Dielectric MOSFETs -From Single Electron Emission to PBTI Recovery Transient∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, pp. 1073-1079, 2006
[3.34] D. Heh, C. D. Young, G. A. Brown, P. Y. Hung, A. Diebold, E. M. Vogel, J. B. Bernstein, G. Bersuker, ─Spatial Distributions of Trapping Centers in HfO2/SiO2 Gate Stack∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 54, NO. 6, pp. 1338-1345, 2007
[3.35] R. Choi, S. J. Rhee, J. C. Lee, B. H. Lee, G. Bersuker, ─Charge Trapping and Detrapping Characteristics in Hafnium Silicate Gate Stack Under Static and Dynamic Stress∥, IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 3, pp. 197-199, 2005
[3.35] S. Chakravarthi, A.T. Krishnan, V. Reddy, C.F. Machala and S. Krishnan, ─A Comprehensive Framework For Predictive Modeling of Negative Bias Temperature
76
Instability∥, International Reliability Physics Symposium, pp. 273-282, 2004
[3.36] A. E. Islam, H. Kufluoglu, D. Varghese, S. Mahapatra, M. A. Alam, ─Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation,Hole Trapping Effects, and Relaxation∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 54, NO. 9, pp. 2143-2154, 2007
[3.37] A. T. Krishnan, S. Chakravarthi, P. Nicollian, ─Negative bias temperature instability mechanism: The role of molecular hydrogen∥, APPLIED PHYSICS LETTERS, VOL 88, pp.153518, 2006
[3.38] J.Y. Choi, P. K. Ko, C. Hu, ∥ Hiot-Carrier-Induced MOSFET Degradation: AC Versus DC Stressing∥, IEEE VLSI Tech, pp. 45-46, 1987
[3.39] C. HU, F. C. HSU, P. K. KO, T. Y. CHAN, K. W. TERRILL, ─Hot
-Electron-Induced MOSFET Degradation-Model, Monitor, and Improvement∥, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-32, NO. 2, pp. 375-385, 1985
[3.40] M. A. Alam, ─Negative Bias Temperature Instability Basics Modeling∥, International Reliability Physics Symposium
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