|
[1] R. Gallager, “Low-Density Parity-Check Codes,” Cambridge, MA:MIT Press, 1963. [2] S. H. Kang and I. C. Park, “Loosely coupled memory-based decoding architecture for low density parity check codes,” IEEE Trans. Circuits Syst., pp. 1045–1056, May. 2006. [3] L. Yang, H. Liu, and C. J. R. Shi, “Code construction and fpga implementation of a low error floor multi-rate low density parity check code, ” IEEE Trans. Circuits and Systems, Vol. 53, pp. 892-904, Apr. 2006. [4] A. J. Blanksby and C. J. Howland, “A 690-mW 1 Gb/s 1024-b, rate-1/2 low-density parity-check code decoder,” IEEE J. Solid-State Circuits, vol. 37, pp. 404-412, Mar. 2002. [5] A. Prabhakar and K. Narayanan, “A memory efficient serial LDPC decoder architecture”IEEE International Conference on Acoustics, Speech, and Signal Processing, vol. 5, pp. 18-23, Mar. 2005. [6] Y. Chen, and K. K. Parhi, “Overlapped message passing for quasi-cyclic low-density parity check codes, ” IEEE Trans. Circuits and Systems, Vol. 51, pp. 1106-1113, Jun. 2004. [7] C. L. Wey and M. D. Shieh, “Algorithms of finding the first two minimum values and their hardware implementation, ” IEEE Trans. Circuits and Systems, Vol. 55, pp. 3430-3437, Dec. 2008. [8] X. Y. Shih, C. Z. Zhan, C.H. Lin, and A. Y. Wu, “An 8.92mm2 52mW multi-mode LDPC decoder design for mobile WiMax system in 0.13um CMOS process, ” IEEE J. Solid-State Circuits, Vol. 43, pp. 672-683, Mar. 2008. [9] T. J. Richardson and R. L. Urbanke, “Efficient encoding of low density parity check codes, “ IEEE Trans. Information theory, Vol. 47, pp. 638-656, Feb. 2001. [10] J. C. Chao and B. Liu, “High performance switches and routers, ” Wiley, pp. 382-391, Apr. 2007. [11] T. T. Lee and S. Y. Liew, “Parallel routing algorithms in Benes-Clos networks, ” IEEE Trans. Broadcasting, Vol. 50, pp. 1841-1847, Nov. 2002. [12] J. Tang, T. Bhatt, V. Sundaramurthy, and K. K. Parhi, “Reconfigurable shuffle network design in LDPC decoder, ” Proc. Int. Conf. Appl. Specific Syst. Archit. Process. (ASAP), pp. 81–86, Sep. 2006. [13] L. Zhang, L. Gui, Y. Xu, and W. Zhang, “Configurable multi-rate decoder architecture for QC-LDPC codes based broadband broadcasting system, ” IEEE Trans. Broadcasting, Vol. 54, pp. 226-235, Jun. 2008. [14] C. H. Liu, C. Z. Zhan, S. W. Yen, C.L. Chen, H. C. Chang, C. Y. Lee, Y. S. Hsu, and S. J. Jou, “An LDPC decoder chip based on self-routing network for IEEE 802.16eapplications, ” IEEE J. Solid-State Circuits, Vol. 43, pp. 684-694, Mar. 2008. [15] IEEE Std 802.16e 2006, “IEEE Standard for Local and metropolitan area networks - Part 16: Air Interface for Fixed and Mobile Broadband Wireless Access System - Amendment 2: Physical and Medium Access Control Layers for Combined Fixed and Mobile Operation in Licensed Band, ” February. 2006.
|