臺灣博碩士論文加值系統

近年來隨著能源問題逐漸受到重視，應用在電源管理的電路研究也越來越重要，例如：手機、PDA…等。因應不同模式的需要切換電壓，藉以達到節省能源的目的。而隨著電子產品縮小化的趨勢，產品中的電源供應系統也朝著縮小設計面積與移除被動元件的方向前進，有兩種主要的方式達到這兩個方向：提高轉換頻率與數位化實現電路。
目前控制器的架構大都是以類比電路的方式去完成，主要是控制變數都是類比訊號，將信號直接處理。但是隨著系統效能管理需求日大，對於多種功能性的需求，類比訊號處理明顯不足，隨著增加的會是晶片面積提升以及電路設計的複雜度，可以預料地，在高速切換式電源轉換器應用，數位控制電路將會取代目前主流的類比控制器。數位實現電路具備的潛在優勢主要包含設計電路的靈活性，受控程序可控的特性，減少外在所需的調節元件，增進系統的可靠度，簡單化系統整合，並且能夠有效提升多種功能的效能。
在此論文中我們實現了一個可以運作在5MHz的高效能數位控制直流電壓產生器，使用一個低功耗低面積的動態類比數位轉換區間以及高解析度的數位脈衝寬度調變器，減少在數位控制電路中資料處理所需要的功耗來達成提高效能的目的。另外為了改善使用動態類比數位轉換區間不利於暫態鎖定速度的問題，我們提出了一個具有暫態加速功能的數位控制器，在最後量測的結果對於鎖定速度最多能夠有三倍的改善，而最高效能也能夠到達93.2%。

Voltage scaling is a technique for high energy-efficiency operation.
However, the voltage scaling technique requires a adaptive
power-supply regulator, which is difficult and complex to implement
by analog control. Digitally controlled dc-dc converters inherently
have the characteristics of flexibility, robust and programmable,
but its efficiency may be lower because of power waste in mixed
signal data conversion.
This thesis demonstrates a complete design of a digitally controlled
buck converter for dynamic voltage systems. The converter senses the
voltage error by a windowed ADC which consumes less power than a
conventional ADC. A nonlinear digital controller is proposed to
improve the tracking performance. A power MOS width slicing technique further increase the power efficiency.
This design is fabricated in a 0.18-um CMOS process. The chip
area is 2.9mm^2. The switching frequency is 5 MHz. The measurement
result shows the power efficiency can achieve 93% and the tracking
behavior could be several times improved by the proposed nonlinear
control.

Chapter 1 Introduction 1
1.1 Background 1
1.2 Motivation 2
1.3 Thesis Organization 3
Chapter 2 Overview of Digitally Controlled DC-DC Buck Converter 5
2.1 Buck Converter Operation 5
2.2 System Architecture 7
2.2.1 ADC and DPWM 8
2.2.2 Digital Compensator . 9
2.2.3 Limit Cycle Oscillation 9
2.2.4 Discontinuous Conduction Mode 9
2.2.5 Adjustable Width Control 11
2.2.6 Summary 11
Chapter 3 Delay-Line Based Analog-to-Digital Converter 13
3.1 Windowed ADC 13
3.2 Current Controlled Delay-Line Based ADC 14
3.2.1 Delay-Line ADC Architecture 14
3.2.2 Voltage to Current Converter 15
3.2.3 Propagation Delay 15
3.2.4 Stage Number 16
3.2.5 Bias Current 18
3.2.6 Non Uniform ADC 18
3.2.7 Moving Average . 20
3.2.8 Summary 21
Chapter 4 Digital Controller 22
4.1 Buck Converter Modeling 22
4.2 PID Controller Design 26
4.3 Turbo Mode For Transient Improvement 29
4.4 Simulation Result 31
4.5 Summary 33
Chapter 5 Chip Implementation and Measurement Results 34
5.1 Mixed-Mode Simulation 34
5.2 Chip Measurement 36
5.2.1 Measurement Setup 36
5.2.2 Measurement Result 37
5.3 Summary 46
6 Conclusion 48

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