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研究生(外文):Liu, Chia-Chi
論文名稱(外文):A Current Mode Sense Amplifier for Small Cell Current Non-Volatile Memory with Offset Suppressing Scheme
指導教授(外文):Chang, Meng-Fan
外文關鍵詞:Non-Volatil memoryCurrent sense amplifierOffset free
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In today’s SOC chip, non-volatile memory plays an important role to store the data from other peripheral unit and can read out repeatable. With the technology shrink, the cell array in same area is larger and larger. However, the cell current is also decreased not only NOR type flash but also NAND type flash or OTP and difficult to read. With the nanometer technology, the transistor threshold voltage mismatch gets more pronounced and making the sensing failure easily.
To solve this problem, we propose a new current mode sense amplifier with offset suppress scheme. In this design, we sample the input current and amplify the difference without regard the threshold voltage variation. Furthermore, we use symmetric array to reduce mismatch between cell side and reference side and use average technique to reduce the variation on reference current due to PVT variation.
We apply our design in 90nm CMOS technology within 512Kb OTP. The experiment result shows that, the minimum cell current can be read in 100nA reference current condition and power supply 1.2V is 140nA.

? Abstract (Chinese)
? Abstract (English)
? Acknowledgements (Chinese)

Chapter 1. Introduction 15
1.1 Applications 15
1.2 Motivation 17
1.3 Contributions 18
1.4 Thesis Overview 18
Chapter 2. Design Challenges of Current Sensing 20
2.1 Array Type 20
2.2 Mismatch 21
2.2.1 Line Edge Roughness (LER) [12, 13] 21
2.2.2 Short Channel Effect [14, 15] 22
2.2.3 Random Dopant Fluctuation (RDF) [17-20] 25
2.3 Sources of Variation Sensitive Parts in Read Path 26
2.3.1 Flash and OTP Cell 27
2.3.2 Current Mirror 28
2.3.3 Sense Amplifier (SA) 31
Chapter 3. Previous Sense Amplifier Circuit (SA) 37
3.1 Fundamentals of Current SA 37
3.1.1 Latch Type SA [28, 29] 37
3.1.2 Mirror Type SA [30-32] 38
3.1.3 Inverter Type SA [33] 39
3.2 Offset Cancellation SA Design 39
3.2.1 Offset Storage [36] 40
3.2.2 Auto-Zeroing Compensate [33, 35, 38] 41
3.2.3 Charge Redistribution Cancellation [39] 42
3.2.4 Threshold Voltage Storage [40] 43
3.2.5 Digital Offset Compensate [41, 42] 44
Chapter 4. Application to Non-Volatile Memory 46
4.1 OTP Cell Characteristic [43] 46
4.2 Read Operation [23, 44] 47
4.3 Macro Implementation 49
4.3.1 Symmetric Array [45] 50
4.3.2 Replica Reference [42] 51
4.3.3 High Voltage Level Shifter [23] 52
4.4 Testchip Design 53
Chapter 5. Proposed Sense Amplifier (SA) 56
5.1 Offset Free Technique 56
5.2 Proposed Scheme Operation 58
5.3 Design Consideration 62
Chapter 6. Analysis and Comparison 71
6.1 Analysis of Proposed SA 71
6.1.1 Function 71
6.1.2 Yield 72
6.1.3 Speed 73
6.1.4 Voltage sensing V.S. Proposed current sensing 75
6.1.5 Limitations 76
6.2 Comparison 79
Chapter 7. Experiments and Conclusion 81
7.1 Experiments Results 81
7.1.1 Test Chip Photo 81
7.1.2 Function Testing 82
7.2 Summary and Conclusion 85
7.3 Future Work 87
References 90

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