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研究生:柯冠鴻
研究生(外文):Ke, Guan-Hong
論文名稱:用於藍芽低功耗單路低中頻接收機之類比中頻電路
論文名稱(外文):Analog IF Circuits for a Single-Path Low-IF Bluetooth Low Energy Receiver
指導教授:黃柏鈞黃柏鈞引用關係
指導教授(外文):Huang, Po-Chiun
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:英文
論文頁數:69
中文關鍵詞:藍芽低功耗解調器雜訊抑制接收機
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在本篇研究中,我們設計了一個類比中頻電路應用於一單路徑低中頻的FSK接收機,整個接收機則是適用在藍芽低功耗的通訊系統當中。在此接收機當中,包含了射頻前端電路,可變增益放大器,以及一個FSK解調器。藍芽低功耗無線通訊系統使用了高斯頻率鍵控(GFSK)做為調變方式,比起傳統的藍芽無線通訊,藍芽低功耗降低了系統規格的需求,並希望借此讓整理電路達到更低的功率消耗。利用此一寬鬆的系統規格,我們提出了一個單一路徑架構的低中頻接收機來達到較低的直流功率消耗。其中單一路徑接收機架構是借由在藍芽低功耗的特殊頻譜特性中選擇適當的中頻頻率來達成,在本研究中此一中頻頻率為0.5MHz。

在射頻前端電路中,我們使用了一個被動組態的低雜訊放大器以及混頻器來提供電壓增益以及完成降頻的功能,並且不需要直流功率的消耗。但是比起傳統的主動式元件,此一方法將會增加後級電路的雜訊表現之需求,為了降低雜訊表現以及直流功率消耗之間的抵換(trade-off),我們在射頻電路後級的可變增益放大器中使用了雜訊抑制的電路技巧,比起傳統以增加直流功率消耗來換取雜訊表現的方式,此一技巧可在功率消耗與雜訊表現中取得更好的平衡。在解調器方面,由於我們所選擇的中頻頻率(0.5MHz)比資料傳輸速率(1MHz)還要低,這將會使得傳統文獻中常用的限幅式(limter-based)解調器無法使用。因此我們提出了一個相位領域的解調器專門為了解決在中頻頻率比資料傳輸率低的情況。此一相位領域解調器在電路實現上採用了三角比率的量化器,將接收到的訊號轉成相位資訊並在相位上做FSK的解調。如此一來即使中頻頻率低於資料傳輸率解調器仍然可以正常動作。這三個電路設計在0.18um的製程之下,操作電壓為1.8V,消耗功率則為1.71毫瓦。


1 Introduction 1
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Specifications of Bluetooth Low Energy 3
2.1 Comparisons between Bluetooth and Bluetooth Low Energy . . . . . . . . . . 3
2.2 Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Modulation Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.4 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.5 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Receiver Architecture 9
3.1 Heterodyne . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Direct conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Wideband-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.4 Low-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Single Path Low-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5.1 Filtering Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4 A Noise Reduction Variable Gain Amplifier 23
4.1 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1.1 Resistor Thermal Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1.2 MOS Channel Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1.3 Gate Induced Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1.4 1/f Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1.5 Power-Noise Tradeoff in Analog Circuits . . . . . . . . . . . . . . . . 25
4.2 Noise Reduction Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2.1 A 4-Stage VGA Circuit with Noise Reduction . . . . . . . . . . . . . . 26
4.2.2 Noise Reduction Concept . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2.3 Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.4 Bias Resistance Effect . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2.5 Offset Cancelation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.3 Circuit Simulation and Measurement . . . . . . . . . . . . . . . . . . . . . . . 36
5 Phase Domain FSK Demodulator 43
5.1 Demodulator Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.1.1 PLL-type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.1.2 Differential or Delay Discriminator . . . . . . . . . . . . . . . . . . . 44
5.1.3 Zero-crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.2 Phase Domain Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.2.1 Phase Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.2.2 Proposed Phase Conversion Approach . . . . . . . . . . . . . . . . . . 52
5.2.3 Phase Domain Demodulation . . . . . . . . . . . . . . . . . . . . . . 53
5.3 Circuit Simulation and Measurement . . . . . . . . . . . . . . . . . . . . . . . 55
5.3.1 Circuits of the Phase Convertor . . . . . . . . . . . . . . . . . . . . . 55
5.3.2 Behavior Simulation of Demodulator . . . . . . . . . . . . . . . . . . 59
5.3.3 Measurement Results and Layout . . . . . . . . . . . . . . . . . . . . 65
6 Conclusion 68
6.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

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