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研究生:吳亭昀
研究生(外文):Ting-Yun Wu
論文名稱:電荷汲取技術於多晶矽薄膜電晶體及n型鍺通道金氧半場效電晶體之研究
論文名稱(外文):A Comprehensive Study of Charge Pumping Technique in Polycrystalline Silicon Thin Film Transistors and Germanium n-MOSFETs
指導教授:劉致為
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:英文
論文頁數:104
中文關鍵詞:多晶矽薄膜電晶體晶粒邊界電荷激發技術
外文關鍵詞:poly-Si TFTsgrain boundarycharge pumpingGermanium
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Characteristics of poly-Si TFTs are greatly influenced by the grain boundary traps. Therefore, it is very important to investigate the grain boundary trap properties in poly-Si TFTs. Charge pumping techniques are suitable for derive more accurately the grain boundary trap properties by measuring the current directly related to the traps where the recombination processes occur. It is better than other method based on measuring the channel current, which is affected only through the potential barrier formed by the traps at the grain boundaries.
In this thesis, geometric effects are studied. Then, measurement pulse conditions are optimized to suppress the geometric effects, which may affect the accuracy of the estimated trap density.
A method to distinguish between the interface traps and grain boundary traps from the charge pumping current, which is contributed from both types of traps, is proposed. Energy distribution of them is also obtained. It is correspond with previous works that grain boundary trap distribution has a deep-level Gaussian distribution with a maximum near the midgap and an exponential-like band tail near the band edges, whereas interface trap distribution has an exponential-like distribution increasing toward the band edges. Besides, the drain avalanche hot carrier (DAHC) effect is also investigated. Due to the high electric field in the drain region, carriers which acquire extra energy from the field undergo impact ionization and generate hot electron-hole pairs. The hot carriers are injected into grain boundaries; therefore, grain boundary traps are created and result in the degradation of the on-current and mobility.
With the continued scaling of modern complementary metal-oxide-semiconductor field-effect transistors (MOSFETs), classical bulk Si MOSFETs are approaching their fundamental limits. Germanium (Ge), which has high intrinsic carrier mobility, as a channel material with high-permittivity (high-κ) gate dielectric MOSFETs are attractive. Charge pumping techniques are extensively used to study the characteristics of interface traps and slow traps of Al2O3/GeO2/Ge n-MOSFETs. Under different fabrication processes, device with Al2O3 gate dielectric deposited by ALD with O3 as oxidant has lower trap density at the Ge/GeO2 interface compared to the one deposited with H2O as oxidant, so the higher mobility is obtained. Finally, positive bias temperature instability (PBTI) characteristics of Ge n-MOSFETs are investigated. The transfer characteristics and charge pumping results show that slow traps increase after stress and result in the degradation of the devices. The trap-depth profiles are also obtained by charge pumping techniques.


List of Tables IV
List of Figures V
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Organization of the Thesis 2
Chapter 2 Optimization of the Charge Pumping Technique in Polycrystalline Silicon Thin-Film Transistors 5
2.1 Introduction 5
2.2 Basic Principle of Charge Pumping Techniques 7
2.3 A Reliable Model for Charge Pumping Techniques 8
2.4 Experimental Setup 13
2.4.1 Fabrication Process 13
2.4.2 Measurement System 15
2.5 Different Pulse Sweep Method 16
2.5.1 Base Sweep Method 16
2.5.2 Amplitude Sweep Method 20
2.6 Geometric Effect 22
2.7 Trap Density Extraction 32
2.8 Energy Distribution of the Trap Density 38
2.9 Summary 41
Chapter 3 Grain Boundary Traps and Interface Traps in Polycrystalline Silicon Thin-Film Transistors 42
3.1 Introduction 42
3.2 Grain Boundary Traps Response 43
3.3 A Method for Separating the Interface and Grain Boundary Traps 48
3.3 Thorough Study of Grain Boundary Traps 49
3.3.1 Energy Distribution of the Grain Boundary Taps 49
3.3.2 Model of the Grain Boundary Traps 52
3.4 Drain Avalanche Hot Carrier (DAHC) Stress 55
3.4.1 I-V Characteristics 57
3.4.2 Lateral Charge pumping—Single Junction Charge Pumping 61
3.4.3 Effect of Grain Boundary Traps on DAHC Degradation 66
3.5 Summary 69
Chapter 4 The Charge Pumping Technique in High-κ Germanium n-MOSFETs 70
4.1 Introduction 70
4.2 Important Issues for Applying CP in High-κ Ge n-MOSFETs 72
4.2.1 Channel Material with Smaller Bandgap 72
4.2.2 Dielectric Material with Strong Trapping Behavior 72
4.2.3 Trap-Depth Profile 75
4.3 Al2O3/GeO2/Ge n-MOSFETs Performance 81
4.3.1 Fabrication Process 81
4.3.2 Interface Characterization 82
4.3.3 Scattering Mechanisms and Mobility degradation 86
4.4 Positive Bias Temperature Instability (PBTI) 90
4.5 Summary 96
Chapter 5 Conclusion and Future Work 97
5.1 Conclusion 97
5.2 Future Work 98
Reference 100



[1] J. Levinson, F. R. Shepherd, P. J. Scanlon, W. D. Westwood, G. Este, and M. Rider, “Conductivity behavior in polycrystalline semiconductor thin film transistors,” J. Appl. Phys., vol.53, no.2, pp.1193-1202, Feb. 1982.
[2] M. Koyanagi et al., “The Charge-Pumping Technique for Grain Boundary Trap Evaluation in Polysilicon TFT’s,” IEEE Electron Device Lett., vol.13, no.3, pp.152-154, Mar. 1992.
[3] G. W. Lee, J. W. Lee, and C. H. Han, “Substrate Resistance Effect on Charge-Pumping Current in Polycrystalline Silicon Thin Film Transistors,” Jpn. J. Appl. Phys., vol.38, Part 1, no.4B, pp.2656-2659, Apr. 1999.
[4] N. S. Saks, S. Batra, and M. Manning, “Charge Pumping in Thin Film Transistors,” Microelectronic Engineering, vol.28, pp.379-382, 1995.
[5] L. Pichon, A. Boukhenoufa, C.Cordier, and B. Cretu, “Determination of interface state distribution in polysilicon thin film transistors from low-frequency noise measurements:Application to analysis of electrical properties,” J. Appl. Phys., vol.100, no.5, pp.054504, Sep. 2006.
[6] G. A. Armstrong, S. Uppal, S. D. Brotherton, and J. R. Ayres, “ Differentiation of Effects due to Grain and Grain Boundary Traps in Laser Annealed Poly-Si Thin Film Transistors,” Jpn. J. Appl. Phys., vol.37, Part 1, no.4A, pp.1721-1726, Apr. 1998.
[7] H. Ikeda, “Evaluation of grain boundary trap states in polycrystalline-silicon thin-film transistors by mobility and capacitance measurements,” J. Appl. Phys., vol.91, no.7, pp.4637-4645, Apr. 2002.
[8] Lei Lu, Mingxiang Wang, and Man Wong, “Geometric Effect Elimination and Reliable Trap State Density Extraction in Charge Pumping of Polysilicon Thin-Film Transistors,” IEEE Electron Device Lett., vol.30, no.5, pp.517-519, May. 2009.
[9] G. Groeseneken, H. E. Maes, N. Beltrán, and Roger F. De Keersmaecker, “A Reliable Approach to Charge-Pumping Measurements in MOS Transistors,” IEEE Trans. Electron Devices, vol. 31, no.1, pp.42-53, Jan. 1984.
[10] Balasinski, J. Worley, K. W. Huang, and F. T. Liou, “Identification of Si/SiO2 Interface Properties in Thin Film Transistors with Charge Pumping Technique,” J. Electrochemical Society, vol.142, no.8, pp.2717-2721, Aug. 1995.
[11] Paul Heremans, Johan Witters, Guido Groeseneken, and Herman E. Maes, “Analysis of the Charge Pumping Technique and Its Application for the Evaluation of MOSFET Degradation,” IEEE Trans. Electron Devices, vol.36, no.7, pp.1318-1335, Jul. 1989.
[12] T. Aichinger and M. Nelhiebel, “Charge Pumping revisited – the benefits of an optimized constant base level charge pumping technique for MOS-FET analysis,” International Integrated Reliability Workshop (IIRW), pp.63-69, 2007.
[13] J.S. Brugler and P.G.A. Jespers, “Charge pumping in MOS devices,” IEEE Trans. Electron Devices, vol.16, no.3, pp.297-302, Mar. 1969.
[14] Geert Van den Bosch, Guido Groeseneken, and Herman E. Maes, “On the Geometric Component of Charge-Pumping Current in MOSFET’s,” IEEE Electron Device Lett., vol.14, no.3, pp.107-109, Mar. 1993.
[15] R. E. Stahlbush, R. K. Lawrence, and W. Richards, “Geometric components of charge pumping current in SOS devices,” IEEE Trans. Nuclear Science, vol.36, no.6, pp.1998-2005, Dec. 1989.
[16] Yujun Li and T. P. Ma, “Suppression of Geometric Component of Charge-Pumping Current in SOI / MOSFETs,” in VLSI Symp. Tech. Dig., pp. 144-148, 1995.
[17] Kee-Jong Kim, Won-Kyu Park, Seong-Gyun Kim, Keong-Mun Lim, In-Gon Lim, and Ohyun Kim, “A NEW CHARGE PUMPING MODEL CONSIDERING BULK TRAP STATES IN POLYSILICON THIN FILM TRANSISTOR,” Solid-State Electronics, vol.42, no.11, pp.1897-1903, Apr. 1998.
[18] Ichiro Yamamoto and Hiroshi Kuwano, “Energy distribution of trapping states at grain boundaries in polycrystalline silicon,” J. Appl. Phys., vol.71, no.7, pp.3350-3355, Apr. 1992.
[19] C. A. Dimitriadis, D.H. Tassis, and N. A. Economou, “Determination of bulk states and interface states distributions in polycrystalline silicon thin-film transistors,” J. Appl. Phys., vol.74, no.4, pp.2919-2924, Aug. 1993.
[20] C. A. Dimitriadis, M. Kimura, M. Miyasaka, S.Inoue, F. V. Farmakis, J. Brini, and G. Kamarinos, “Effect of grain boundaries on hot-carrier induced degradation in large grain polysilicon thin-film transistors,” Solid-State Electronics, vol.44, pp.2045-2051, Apr. 2000.
[21] Toshiaki Tsuchiya, Toshio Kobayashi, and Shigeru Nakajima, “Hot-Carrier-Injected Oxide Region and Hot-Electron Trapping as the Main Cause in Si nMOSFET Degradation,” IEEE Trans. Electron Devices, vol.34, no.2, pp.386-391, Feb. 1987.
[22] Toshiyuki Yoshida, Yoshiki Ebiko, Michiko Takei, Nobuo Sasaki, and Toshiaki Tsuchiya, “Grain-Boundary Related Hot Carrier Degradation Mechanism in Low-Temperature Polycrystalline Silicon Thin-Film Transistors,” Jpn. J. Appl. Phys., vol.42, Part 1, no.4B, pp.1999-2003, Apr. 2003.
[23] John Y. W. Seto, “The electrical properties of polycrystalline silicon films,” J. Appl. Phys., vol.46, pp.5247-5254, Dec. 1975.
[24] Yukiharu Uraoka, Tomoaki Hatayama, Takashi Fuyuki, Tetsuya Kawamura, and Yuji Tsuchi, “Hot Carrier Effects in Low-Temperature Polysilicon Thin-Film Transistors,” Jpn. J. Appl. Phys., vol.40, Part 1, no.4B, pp.2833-2836, Apr. 2001.
[25] Kow Ming Chang, Yuan Hung Chung, and Gin Ming Lin, “Hot Carrier Induced Degradation in the Low Temperature Processed Polycrystalline Silicon Thin Film Transistors Using the Dynamic Stress,” Jpn. J. Appl. Phys., vol.41, Part 1, no.4A, pp.1941-1946, Apr. 2002.
[26] Chun Chen and Tso-Ping Ma, “Direct Lateral Profiling of Hot-Carrier-Induced Oxide Charge and Interface Traps in Thin Gate MOSFET''s,” IEEE Trans. Electron Devices, vol.45, no.2, pp.512-520, Feb. 1998.
[27] Mario G. Ancona, Nelson S. Saks, and Daniel Mccarthy, “ Lateral Distribution of Hot-Carrier-Induced Interface Traps in MOSFET''s,” IEEE Trans. Electron Devices, vol.35, no.12, pp.2221-2228, Dec. 1988.
[28] Wenliang Chen, Atur Balasinski, and Tso-Ping Ma , “Lateral Profiling of Oxide Charge and Interface Traps Near MOSFET Junctions,” IEEE Trans. Electron Devices, vol.40, no.1, pp.187-196, Jan. 1993.
[29] Judith L. Dimauro and Albert K. Henning, “LATERAL DISTRIBUTION OF INTERFACE STATES IN PMOSFET''S,” in IEDM Tech. Dig., pp.81-84, 1990.
[30] N.A. Hastas, N. Archontas, C.A. Dimitriadis, G. Kamarinos, T. Nikolaidis, N. Georgoulas, and A. Thanailakis, “Substrate current and degradation of n-channel polycrystalline silicon thin-film transistors,” Microelectron. Reliab., vol.45, pp.341-348, 2005.
[31] Yosuke Nakakita, Ryosho Nakane, Takashi Sasada, Hiroshi Matsubara, Mitsuru Takenaka, and Shinichi Takagi, “Interface-controlled Self-Align Source/Drain Ge pMOSFETs Using Thermally-Oxidized GeO2 Interfacial Layers,” in IEDM Tech. Dig., pp.877-880, 2008.
[32] Ruilong Xie, Thanh Hoa Phung, Wei He, Mingbin Yu, and Chunxiang Zhu, “Interface-Engineered High-Mobility High-κ/Ge pMOSFETs With 1-nm Equivalent Oxide Thickness,” Trans. Electron Devices, vol.56, no.6, pp.1330-1337, June. 2009.
[33] Koen Martens, Brice De Jaeger, Renaud Bonzom, Jan Van Steenbergen, Marc Meuris, Guido Groeseneken, and Herman Maes, “New Interface State Density Extraction Method Applicable to Peaked and High-Density Distributions for Ge MOSFET Development,” IEEE Electron Device Lett., vol.27, no.5, pp.405-408, May. 2006.
[34] K. Martens, B. Kaczer, T. Grasser, B. De Jaeger, M. Meuris, H. E Maes, and G. Groeseneken, “Applicability of Charge Pumping on Germanium MOSFETs,” IEEE Electron Device Lett., vol.29, no.12, pp.1364-1366, Dec. 2008.
[35] Andreas Kerber, Eduard Cartier, Robin Degraeve, Philippe J. Roussel, Luigi Pantisano, Thomas Kauerauf, Guido Groeseneken, Herman E. Maes, and Udo Schwalke, “Charge Trapping and Dielectric Reliability of SiO2-Al2O3 Gate Stacks With TiN Electrodes,” Trans. Electron Devices, vol.50, no.5, pp.1261-1269, May. 2003.
[36] Stefan Jakschik, Alejandro Avellan, Uwe Schroeder, and Johann W. Bartha, “Influence of Al2O3 Dielectrics on the Trap-Depth Profiles in MOS Devices Investigated by the Charge-Pumping Method,” Trans. Electron Devices, vol.51, no.12, pp.2252-2255, Dec. 2004.
[37] M. Declerq and P. Jespers, “Analysis of interface properties in MOS transistors by means of charge pumping measurements,” Rev. HF, Acta. Tech. Belg., vol.9, pp.244-244, 1974.
[38] Ronald E. Paulsen and Marvin H. White, “Theory and Application of Charge Pumping for the Characterization of Si-SiO2 Interface and Near-Interface Oxide Traps,” Trans. Electron Devices, vol.41, no.7, pp.1213-1216, Jul. 1994.
[39] Y. Maneglia and D. Bauzaa, “Extraction of slow oxide trap concentration profiles in metal–oxide–semiconductor transistors using the charge pumping method,” J. Appl. Phys., vol.79, no.8, pp.4187-4192, Apr. 1996.
[40] F. P.Heimann and G. Warfield, “The Effects of Oxide Traps on the MOS Capacitance,” Trans. Electron Devices, vol.12, no.4, pp.167-178, Apr.1965.
[41] Ruilong Xie, Nan Wu, Chen Shen, and Chunxiang Zhu, “Energy distribution of interface traps in germanium metal-oxide-semiconductor field effect transistors with HfO2 gate dielectric and its impact on mobility,” Appl. Phys. Lett., vol.93, no. 8, pp.083510, Aug. 2008.
[42] Peter Broqvist, Audrius Alkauskas, and Alfredo Pasquarello, “Defect levels of dangling bonds in silicon and germanium through hybrid functional,” Phys. Rev. B., vol.78, pp.075203, Aug. 2008.
[43] A. Dimoulas, P. Tsipas, A. Sotiropoulos, and E. K. Evangelou, “Fermi-level pinning and charge neutrality level in germanium,” Appl. Phys. Lett., vol.89, no. 25, pp.252110, Dec. 2006.
[44] Duygu Kuzum, Tejas Krishnamohan, Aneesh Nainani, Yun Sun, Piero A. Pianetta1, H. S-. P. Wong, and Krishna C. Saraswat, “Experimental Demonstration of High Mobility Ge NMOS,” in IEDM Tech. Dig., pp.453-456, 2009
[45] C. H. Lee, T. Nishimura, N.Saido, K. Nagashio, K. Kita, and A. Toriumi, “Record-high Electron Mobility in Ge n-MOSFETs exceeding Si Universality,” in IEDM Tech. Dig., pp.457-460, 2009.
[46] Nan Wu, Qingchun Zhang, N. Balasubramanian, Daniel S. H. Chan, and Chunxiang Zhu, “Characteristics of Self-Aligned Gate-First Ge p- and n-Channel MOSFETs Using CVD HfO2 Gate Dielectric and Si Surface Passivation,” Trans. Electron Devices, vol.54, no.4, pp.733-741, Apr. 2007.


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1. 蔡美瑛、陳蕙芬,1998,整合行銷傳播在高科技產業行銷上之應用-以 Computex Taipei'96 英代爾(Intel)公司參展個案為例,民意研究季刊,204 期,46-62。
2. 1. 石豐宇、謝正宏(2009),「應用賽局理論研擬高速鐵路通車後之國道客運競爭策略」,運輸計劃季刊,第三十八卷,第一期,頁69-83。
3. 16. 張學孔、凃保民(1994),「計程車計時收費之研究」,運輸計劃季刊,第二十三卷,第三期,頁273-288。
4. 2. 李克聰、李睿玟、蔡冉慧、郭淑慈(1997),「由計程車的權利與義務談如何提升其成為良好可靠的運輸工具」,都市交通,94期,頁43-51。
5. 15. 張學孔(1993),「計程車運價訂定原理與計費方案分析」,都市交通,第70期,頁23-28。
6. 31. 藍武王、周文生、邱裕鈞(1997),「智慧型計程車計費器之系統規劃:IC卡技術之應用」,都市交通,94期,頁6-15。
7. 23. 黃承傳、蔡義清、洪玉輔(2003),「計程車分級定價之研究」,運輸學刊,第15 卷,第2 期,頁207-225。
8. 18. 張學孔、郭瑜堅(2007),「都市旅次總成本模式構建之研究」,運輸計劃季刊,第三十六卷,第二期,頁147-182。
9. 6. 何依栖(1989),「都會區計程車共乘制度實施及管理之探討」,運輸計劃季刊,第18 卷,第4 期,頁507-518。
10. 14. 張堂賢、孫桂英(1997),「彈性起跳運價的計程車市場變革探討」,都市交通,第94期,頁52-58。
11. 劉美琪,2001,整合行銷傳播在國內廣告代理業的應用情形研究,廣告學研究,16 期,83-114。
12. 13. 張堂賢(1992),「都會區計程車運輸市場及其訂價研究」,運輸計劃季刊,第21卷,第一期,頁63-94。
 
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