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研究生:吳東樺
研究生(外文):Dong-Hua Wu
論文名稱:集合關聯式之載入/儲存快取記憶體
論文名稱(外文):SALSC: Set-Associative Load/Store Caches
指導教授:黃元欣黃元欣引用關係
指導教授(外文):Yuan-Shin Hwang
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:資訊工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:中文
論文頁數:51
中文關鍵詞:載入儲存佇列功率消耗
外文關鍵詞:LSQLoad Store QueueEnergy-efficiencyCAM
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傳統的載入/儲存佇列(Load / Store Queue, LSQ)是一種(Content-Address Memory, CAM)的結構,在動態排程(dynamically-scheduled)的處理器裡儲存所有執行中(in-flight)的記憶體指令,利用完全關聯集合(fully-associative)與順序邏輯(ordering-logic)來搜尋以維護相依性與達成資料前送(data forwarding)。在過去的研究顯示LSQ的相依違反並不常見也因此較沒效率,在CAM的架構上也過於複雜不適合擴展。本文提供一個有效率且可擴展並不同於LSQ的架構,稱為集合關聯載入/儲存快取記憶體(Set-Associative Load/Store Cache - SALSC),用集合關聯標籤(tag)陣列將CAM的結構替換掉。類似用集合關聯快取記憶體來取代完全關聯快取記憶體,因為完全關聯的標籤與位元陣列是一個CAM。如同已觀察的集合關聯快取記憶體可以大幅減少標籤的比對數,又接近完全關聯快取記憶體的失誤率,因此SALSC可以大幅減少搜尋頻寬的需求,並且沒有因集合衝突的影響遭受效能嚴重的下降。此外SALSC可以看成一個與年齡邏輯(age logic)整合的集合關聯快取記憶體,因此可以自然的將SALSC直接延伸當成L0的快取記憶體,可用來緩衝記憶體的資料在項目(entry)裡。在SPECint2000的執行顯示32-entry與128-entry的4-way SALSC可以大幅減少搜尋頻寬的需求且效能沒有明顯下降,在128-entry L0 SALSC更可以改進0.22%的平均執行時間。
The conventional load/store queue (LSQ) is a CAM structure where a dynamically-scheduled processor stores all in-flight memory instructions and conducts fully associative, ordering-logic searches to maintain dependencies and perform forwarding. LSQ is neither efficient since previous studies have shown that dependency violations are infrequent, nor scalable due to the complexity of the CAM. This paper presents an efficient and scalable alternative to the LSQ, called the set-associative load/store cache (SALSC), that replaces the CAM with a set-associative tag array. It is analogous to substituting a set-associative cache for a fully associative cache, since the tag bit cell of a fully-associative array is a CAM. As it has been observed that set-associative caches can significantly reduce tag comparisons while approximating the miss rates of fully associative caches, SALSC can substantially lessen the search bandwidth demand without incurring noticeable performance degradation due to stalls caused by set conflicts. Furthermore, an SALSC can be viewed as a set-associative cache integrated with an age logic, and hence it is a natural and straightforward extension to treat an SALSC as an L0 cache by buffering data of memory references in the entries. Experimental results of SPECint2000 benchmarks show that both a 32-entry and a 128-entry 4-way SALSC can significantly reduce the search bandwidth demand with no visible performance penalties, while a 128-entry L0 SALSC can improve the average execution times by 0.22%.
論文摘要 I
ABSTRACT III
誌 謝 IV
目錄 V
圖目錄 VII
表目錄 VIII
第一章 序論 1
1.1 研究動機 1
1.2 研究目的 2
1.3 研究方法 4
1.4 論文架構 5
第二章 文獻探討 6
2.1 研究背景 6
2.2 載入/儲存佇列 6
2.3 完全關聯式快取 8
2.4 相關工作 9
2.4.1 循序配置LSQ 9
2.4.2 位址索引配置LSQ 10
2.4.3 其它方法 12
第三章 研究方法 13
3.1 集合式關聯之載入/儲存快取 13
3.2 配置策略 14
3.3 運作流程 15
3.4 年齡邏輯 16
3.5 避免死結 17
第四章 實驗結果 19
4.1 實驗設定 19
4.2效能評估 20
4.2.1 執行影響 21
4.2.2 減少搜尋頻寬需求 23
4.2.3 集合溢出 26
4.2.4 配置策略 28
4.2.5 重新執行 29
4.2.6 增加容量 30
4.2.7 視 SALSC 為較小的L0快取記憶體 33
第五章 結論與未來展望 36
5.1 結論 36
5.2 未來展望 37
參考文獻 38
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