臺灣博碩士論文加值系統

當元件製程縮小化，同時閘極氧化層也會跟著縮小，進而衍生出穿隧漏電流效應等問題，而會導致高耗電量。本篇主要用Hf2La2O7高介電係數以共同濺鍍方式沈積Ti和TiAl，具不同Ti和TiAl含量之HfLaTiON及HfLaTiAlON高介電係數，利用不同比例Ti和TiAl的摻雜量搭配不同沉積後溫度熱處理，形成複合材料HfLaTiON、HfLaTiAlON，探討對金氧半(Metal-Oxide-Semiconductor, MOS)元件的電性及可靠度影響，並利用材料分析得出HfLaTiON、HfLaTiAlON之組成比、結晶特性、能隙與能帶圖等，藉由電流-電壓-變溫(I-V-T)量測獲得漏電流傳導機制。
實驗結果指出，HfLaTiON以共同濺鍍的方式摻雜Ti後，HfLaTiON具有很低的等效氧化層厚度(EOT)，而Ti共同濺鍍16秒，經過750 ℃快速熱退火處理，可獲得最佳的等效氧化層厚度為1.7 Å 及介面缺面密度為3.19×1011 cm-2 eV-1，而RTA 750 ℃而Ti共同濺鍍32秒，從Schottky Emission量測可萃取出Schottky能障為0.8 eV。而另一個高介電係數材料HfLaTiAlON以共同濺鍍的方式摻雜TiAl後，HfLaTiAlON具有很低的等效氧化層厚度(EOT)，而Ti共同濺鍍50秒，經過950 ℃快速熱退火處理，可獲得最佳的等效氧化層厚度為0.93 Å 及介面缺面密度為1.9×1011 cm-2 eV-1，而RTA 650 ℃而Ti共同濺鍍50秒，從Schottky Emission量測可萃取出Schottky能障為0.74 eV。
藉由Ta在HfLaTiON及HfLaTiAlON的功函數、Ta/HfLaTiON
Ta/HfLaTiAlON的Schottky barrier及HfLaTiAlON、 HfLaTiON能隙等的測量可獲得能帶圖，提供元件各種特性的參考輔助。

High-dielectric-constant (high-k) gate oxides with larger physical thickness while identical equivalent-oxide-thickness (EOT) have been widely used to supersede SiO2 for reducing gate leakage current in metal-oxide-semiconductor (MOS) devices. In this thesis, electrical and reliability characteristics of advanced MOS capacitors with various Ti- and Al-doped HfLaON dielectrics were demonstrated. Various Ti and TiAl concentrations in HfLaTiON and HfLaTiAlON dielectrics were achieved by co-sputter time of Ti, TiAl, and Hf2La2O7 targets. Modulated parameters include the co-sputter time of Ti, TiAl, and Hf2La2O7 targets, as well as post-deposition annealing (PDA). The compositions, crystalline properties, and energy band gap of HfLaTiON and HfLaTiAlON dielectrics were investigated by XPS, XRD, and UV/VIS/IR spectrophotometer, respectively. The results indicate that lower EOT of 0.17 nm and interface trap density (Dit) can be obtained by Ti-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiON interface was around 0.8 eV. Also the results indicate that lower EOT of 0.093 nm and interface trap density (Dit) can be obtained by TiAl-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiAlON interface was around 0.74 eV.

摘要………………………………………………………………………………i
Abstract…………………………………………………………………………ii
誌謝……………………………………………………………………………iii
目錄……………………………………………………………………………iv
表目錄…………………………………………………………………………vii
圖目錄…………………………………………………………………………viii
第一章 緒論……………………………………………………………………1
1.1 高介電係數閘極介電層(High-k dielectric)發展概述……………….1
1.2 研究動機…………………………………………………………….…5
1.3 論文架構…………………………………………………………….…5
第二章 元件製程與量測儀器……………………………………………………7
2.1 探討不同熱處理溫度對具不同比例Ti摻雜之HfLaTiON當金氧半
元件之閘介電層特性究………………………………………………7
2.1.1 沉積薄膜前之晶圓處理………………………………………8
2.1.2 高介電係數閘極介電層沉積及退火處理……………………8
2.1.3 上電極金屬沉積………………………………………………9
2.2 探討不同熱處理溫度對具不同比例TixAly摻雜之HfLaTiAlON當
金氧半元件之閘介電層特性究………………………………………9
2.2.1 沉積薄膜前之晶圓處理………………………………………10
2.2.2 高介電係數閘極介電層沉積及退火處理……………………10
2.2.3 上電極金屬沉積………………………………………………11
2.3 電性特性量測…………………………………………………………11
2.3.1電容-電壓特性…………………………………………………11
2.3.2電流-電壓特性量測……………………………………………12
2.3.3介面缺陷密度(Interface Trap Dentisy, Dit)特性量測…………12
2.3.4漏電流傳導機制量測…………………………………………12
2.4 可靠度特性量測……………………………………………………13
2.4.1應力引起之漏電流(Stress-Induced Leakage Current, SILC)可
靠度特性量測…………………………………………………13
2.4.2應力引起之平帶電壓偏移(Stress-Induced Flatband Voltage Shift,
SIFC)可靠度特性量測…………………………………………13
2.5 材料物理特性量測……………………………………………………14
2.5.1 X-Ray繞射儀(XRD) …………………………………………14
2.5.2化學分析電子儀(ESCA) ………………………………………14
2.5.3紫外光/可見光/光譜儀 (UV-VIS-NIR Spectrophotometr)…15
第三章 探討不同熱處理溫度對具不同比例Ti摻雜之HfLaTiON當金氧
半元件之閘介電層特性研究………………………………………23
3.1 研究動機…………………………………………………………23
3.2 實驗結果與討論…………………………………………………23
3.3結論………………………………………………………………28
第四章 探討不同熱處理溫度對具不同比例TixAly摻雜之HfLaTiAlON
當金氧半元件之閘介電層特性研究………………………………58
4.1 研究動機…………………………………………………………58
4.2實驗結果與討論…………………………………………………59
4.3結論………………………………………………………………62
第五章 結論與建議……………………………………………………………92
5-1結論………………………………………………………………92
5-2建議………………………………………………………………93
參考文獻………………………………………………………………………95
英文論文大綱
作者簡歷

[1]N. Lu, H.-J. Li, J. J. Peterson, D. L. Kwong, “HfTiAlO dielectric as an alternative high-k gate dielectric for the next generation of complementary metal-oxide-semiconductor devices,” Appl. Phys. Lett. 90 (2007).
[2]H. J. Li, J. Price, M. Gardner, N. Lu, D. L. Kwong, “High permittivity quaternary metal (HfTaTiOx) oxide layer as an alternative high-κ gate dielectric,” Appl. Phys. Lett. 89 (2006).
[3]Q. Xu, G. Xu, W. Wang, D. Chen, S. Shi, Z. Han, T. Ye, “Study on characteristics of thermally stable HfLaON gate dielectric with TaN metal gate,” Appl. Phys. Lett. 93 (2008).
[4] H. Arimura, N. Kitano, Y. Naitou, Y. Oku, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe, “Excellent electrical properties of TiO2/HfSiO/SiO2 layered higher-k gate dielectrics with sub-1 nm equivalent oxide thickness,” Appl. Phys. Lett. 92 212902 (2008).
[5]G. K. Dalapati, A. Sridhara, A. S. W. Wong, C. K. Chia, and D. Z. Chi,“ HfOxNy gate dielectric on p-GaAs ,” Appl. Phys. Lett. 94 073502 (2009).
[6]J.C. Kang, C. Rhee, S. Choi, C. Krishnan, S. Ok, I. Akbar, M. Kim, H. Zhu, F. Zhang, M. Lee, “Hafnium-based high-k dielectrics,” IEEE pp122-125 (2005).
[7]N. Lu, H. J. Li, M. Gardner, S. Wickramanayaka, D. L. Kwong, “Higher-k HfTaTiO gate dielectric with improved material and electrical characteristics,” IEEE Electron Device Letters, Vol. 26, No. 5, May (2005).
[8]S. J. Rhee, F. Zhu, H. S. Kim, C. H. Choi, C. Y. Kang, M. Zhang, T. Lee, I. Ok, S. A. Krishnan, J. C. Lee, “Hafnium Titanate bilayer structure multimetal dielectric nMOSCAPs,” IEEE Electron Device Letters, Vol. 27, No. 4, April (2006).
[9] F. Ji, J. P. Xu, P. T. Lai, C. X. Li, J. G. Guan, “Electrical properties of HfTiON gate-dielectric metal-oxide-semiconductor capacitors with different Si-surface nitridations,” Appl. Phys. Lett. 91 052902 (2007).
[10] C. L. Cheng, C. W. Liu, J. T. Jeng, “Work function tuning of the TixTayN metal gate electrode for advanced metal-oxide-semiconductor devices applications,” Appl. Phys. Lett. 90 062114 (2007).
[11] S. I. Park, I. Ok, H. S. Kim, F. Zhu, M. Zhang, J. H. Yum, Z. Han, J. C. Lee, “Optimization of electrical characteristics of TiO2-incorporated HfO2 n-type doped gallium arsenide metal oxide semiconductor capacitor with silicon interface passivation layer,” Appl. Phys. Lett. 91 082908 (2007).
[12] C. H. Liu, H. W. Chen, S. Y. Chen, H. S. Huang, L. W. Cheng, “Current conduction of 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics,” Appl. Phys. Lett. 95 012103 (2009).
[13] Q. Xu, G. Xu, W. Wang, D. Chen, S. Shi, Z. Han, T. Ye, “Study on characteristics of thermally stable HfLaON gate dielectric with TaN metal gate,” Appl. Phys. Lett. 93 252903 (2008).
[14] N. Wu, Q. Zhang, C. Zhu, C. C. Yeo, S. J. Whang, D. S. H. Chan, M. F. Li, B. J. Cho, A. Chin, D. L. Kwong, A. Y. Du, C. H. Tung, N. Balasubramanian, “Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate,” Appl. Phys. Lett. 84 3741 (2004).
[15] T. Yang, Y. Xuan, D. Zemlyanov, T. Shen, Y. Q. Wu, J. M.
Woodall, P. D. Ye, F. S. A. Tostado, M. Milojevic, S. McDonnell, R. M. Wallace, “Interface studies of GaAs metal-oxide-semiconductor structures using atomic-layer-deposited HfO2/Al2O3 nanolaminate gate dielectric,” Appl. Phys. Lett. 91 142122 (2007).
[16] E. Rosenbaum, and L. F. Register, “Mechanism of stress-induced leakage current in MOS capacitors,” IEEE Transactions on Electron Devices, Vol. 44, No. 2, February (1997).
[17] F. Irrera, B. Riccò, “SILC dynamics in MOS structures subject to periodic stress,” IEEE Transactions on Electron Devices, Vol. 49, No. 10, October (2002).
[18] C. Xinhong, W. Li, S. Zhaorui, Y. Yuehui, S. DaShen, “Interfacial structures and electrical properties of HfAl2O5 gate dielectric film annealed with a Ti capping layer,” IEEE Transactions on Electron Devices, Vol. 90, No. 15, June (2009).
[19] J. P. Xu, F. Ji, C. X. Li, P. T. Lai, J. G. Guan, Y. R. Liu, “Improved
electrical properties of metal-oxide-semiconductor capacitor with HfTiON gate dielectric by using HfSiON interlayer,” Appl. Phys. Lett. 91 152905 (2007).
[20] S. Y.g Kim, H. Kwon, S. J. Jo, J. S. Ha, W. T. Park, D. K. Kang, B. H. Kim, “Effects of Al content on the electrical properties of LaxAlyOz films grown on TiN substrate by atomic layer deposition Improved electrical properties of metal-oxide-semiconductor capacitor with HfTiON gate dielectric by using HfSiON interlayer,” Appl. Phys. Lett. 90 103104 (2007).
[21] A. Dimoulas, G. Mavrou, G. Vellianitis, E. Evangelou, N. Boukos,
M. Houssa, M. Caymax, “HfO2 high-κ gate dielectrics on Ge (100) by atomic oxygen beam deposition,” Appl. Phys. Lett. 86 032908 (2005).
[22] X. Yu, J. Huang, M. Yu, C. Zhu, “Effect of Gate Dopant Diffusion on Leakage Current in n+Poly-Si/HfO2 and Examination of Leakage Paths by Conducting Atomic Force Microscopy,” IEEE Electron Device Letters, Vol. 28, No. 5, May (2007).
[23] S. Jeon, H. Hwanga, “Electrical and physical characteristics of PrTixOy for metal-oxide-semiconductor gate dielectric applications,” Applied Physics Letters, Vol. 81, No. 25, December (2002).
[24] Y. Oshima, M. Shandalov, Y. Sun, P. Pianetta, P. C. McIntyre, “Hafnium oxide/germanium oxynitride gate stacks on germanium: Capacitance scaling and interface state density,” Applied Physics Letters 94, 183102 (2009).
[25] G. K. Dalapati, A. Sridhara, A. S. W. Wong, C. K. Chia, D. Z. Chi, “HfOxNy gate dielectric on p-GaAs,” Applied Physics Letters 94, 073502 (2009).
[26] Y. Zhao, K. Kita, K. Kyuno, Akira Toriumi, “Band gap enhancement and electrical properties of La2O3 films doped with Y2O3 as high-k gate insulators,” Applied Physics Letters 94, 042901 (2009).
[27] I. Ok, H. Kim, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, D. Garcia,
, P. Majhi, N. Goel, W. Tsai, C. K. Gaspe, M. B. Santos, J. C. Lee, “Improved leakage and ferroelectric properties of Mn and Ti codoped BiFeO3 thin films,” Applied Physics Letters 92, 112904 (2008).
[28] C. Rossel, B. Mereu, C. Marchiori, D. Caimi, M. Sousa, A. Guiller, H. Siegwart,
Guiller, H. Siegwart, R. Germann, J. P. Locquet, J. Fompeyrine, D. J. Webb, C. Dieker, J. W. Seo, “Field-effect transistors with SrHfO3 as gate oxide,” Applied Physics Letters 89, 053506 (2006).
[29] C. H. Wu, B. F. Hung, S. J. Wang, X. P.Wang,M.-F. Li, C. Zhu, F. Y. Yen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, M. S. Liang, “High-Temperature Stable HfLaON p-MOSFETs With High-Work-Function Ir3Si Gate,” IEEE Electron Device Letters, VOL. 28, NO. 4, APRIL (2007).
[30] C. H Liu, H. W. Chen, S. Y. Chen,H. S. Huang, L. W. Cheng, “Current conduction of 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics,” Applied Physics Letters 95, 012103 (2009).
[31] X. B. Lu, X. Zhang, R. Huang, H. B. Lu, Z. H. Chen, W. F. Xiang, M. He, B. L. Cheng, H. W. Zhou, X. P. Wang, C. Z. Wang, B. Y. Nguyen, “Thermal stability of LaAlO3/Si deposited by laser molecular-beam epitaxy,” Applied Physics Letters Vol 84, Number 14 5 April (2004).
[32] N. Lu, H. J. Li, M. Gardner, D. L. Kwong, “Higher K HfTaTiO gate dielectric with improved material and electrical characteristics,” IEEE Electron Device Letters, Vol. 1, (2005).