本論文研究視訊適應性差量調變器，主要為改進差量調變器於寬頻中所產生的斜率失真及粒狀雜訊的問題，增加被編碼信號的頻寬，可應用於視訊編碼。在信號處理上，以數位式差量調變器做為基本架構，並加入邏輯判斷電路與+1-1+0選擇、累加器，信號經結合後輸出，適應性差量之調整方法為當輸出連續三個1位元以上出現時，累加器增加1位元，使其差量增倍(+2Δ)；當連續三個0位元以上出現時，累加器減少1位元，使其差量降一倍(-2Δ)；否則以正常增量(+Δ)或減量(-Δ)大小處理，累加器則增減”0”位元，此種信號處理方式簡單，且對於寬頻信號之實用性很高。
文中使用National Instruments開發的Multisim軟體，設計調變器之電路，並以5MHz視訊進行模擬。模擬結果證實本文所設計的數位電路邏輯正確無誤，其視訊信號設計之5MHz，並以40MHz取樣頻率經適應性調變與解調處理後，恢復訊號之總諧波失真低於2%，可滿足高品質視訊傳輸需求。
最後，電路硬體的實作，使用Altium開發的Designer6軟體來做電路的佈置，將視訊適應性差量調變器製作在5公分X10公分的電路板上，由14個IC元件所組成，經視訊測試結果，符合模擬之結果。論文之研究驗證了本文設計之視訊調變解調變適用於寬頻數位視訊傳輸，且具實用價值。

This article is the study of design and implementation of adaptive delta modulation. Reducing the slope overload and granular noise of wideband signal coding is our main purpose, it can also increase the bandwidth of encoding signal and suitable application for video signal. In signal processings ,we combined the basic architecture of digital type delta modulation with decision logic circuit and +1/-1/+0 selection accumulation circuit to change adaptively delta quantitiesΔ. The algorithm of decision logic is when three consecutive 1s or 0s of digital encoded signal occur.Δ changes 2Δ, otherwise Δ unchange. This treatment is simple, wideband and practical.
The Multisim software developed by National Instruments is used in our circuit design. We tooth the values of 5MHz bandwidth of video for circuit simulation and confirm the correctness in our digital circuit design. The total harmonic distortion is less than 2% when we used the parameters of 5MHz video bandwidth and 40MHz sampling frequency. It can satisfy the requirement for high quality video transmission.
Finally, the adaptive delta modulator was implemented in 5cm X 10cm PCB and using 14 IC components through circuit layout software by Design6 developed Altium. This measurement results are consistent with simulation results. The study is verified the availability of the modem for digital video transmission and having practical value.

中文摘要 ................................................i
英文摘要 . ...........................................ii
誌謝 ..................................................iii
目錄 ...................................................iv
表目錄 .................................................vi
圖目錄 ................................................vii
第一章 緒論 ............................................1
1.1 背景回顧 .......................................1
1.2 研究目的與動機 .................................2
1.3 論文架構 ............................................3
第二章 差量調變及適應性差量調變之簡述 ..................4
2.1 差量調變器 .....................................4
2.2 適應性差量調變器 ...............................4
2.3 視訊適應性差量調變器前述.............................6
第三章 視訊適應性差量調變器/解調變器架構設計與信號處理方法 ......................................................8
3.1 視訊適應性差量調變器架構.............................8
3.1.1 邏輯判斷電路 .....................................9
3.1.2 +1/-1/+0選擇/累加器 .............................10
3.2 視訊適應性差量解調變器架構..........................12
3.2.1 時脈恢復電路 ....................................13
3.2.2 低通濾波器 ......................................14
第四章 視訊適應性差量調變器軟體模擬 ...................17
4.1各模組功能模擬 ......................................17
4.1.1 取樣保持電路 ....................................18
4.1.2 訊號比較器 ......................................19
4.1.3 位階產生器 ......................................20
4.1.4 邏輯判斷電路 ....................................21
4.1.5 +1/-1/+0選擇/累加器 .............................22
4.1.6 數位/類比轉換電路 ...............................24
4.1.7 視訊適應性差量解調變器模擬 ......................25
4.2 模擬結果與分析 .....................................27
4.2.1 總諧波失真與取樣頻率 ............................27
4.2.2 總諧波失真與輸入頻率 ............................28
第五章 視訊適應性差量調變硬體實現與量測 ...............30
5.1 電路板功能測試 .....................................33
5.2 系統量測............................................34
第六章 結論 ...........................................38
參考文獻 ...............................................39
附錄
A Multisim模擬軟體 ...............................40
B designer6電路板佈局軟體 .........................42

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