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研究生:龔靖洋
研究生(外文):Jing Yang Kung
論文名稱:應用於身體感測網路之13.56MHz射頻前端電路設計
論文名稱(外文):13.56MHz RF front-end for Body Sensor Network
指導教授:李順裕
指導教授(外文):Shuenn-Yuh Lee
口試委員:黃弘一洪浩喬蔡宗亨張順志
口試委員(外文):Hong-Yi HuangHao-Chiao HongTsung-Heng TsaiSoon-Jyh Chang
口試日期:2011-01-25
學位類別:碩士
校院名稱:國立中正大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:中文
論文頁數:72
中文關鍵詞:13.56MHz 射頻前端電路CMOS橋式整流器線性穩壓器BPSK解調變器時脈資料分離器
外文關鍵詞:13.56MHz RF front-endCMOS rectifierlinear regulatorBPSK demodulatorclock/data separator
相關次數:
  • 被引用被引用:2
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本論文為應用於身體感測網路之13.56MHz射頻前端電路設計,晶片內容主要分為四大方塊,分別為全波橋式整流器(Rectifier)、線性穩壓器(Linear Regulator)、二元相位調變解調器(BPSK Demodulator)和時脈/資料分離器(Clock/Data Separator)。
此晶片做為植入式無電池系統13.56MHz射頻前端電路,主要用以提供系統晶片功率和控制訊號,而功率和控制訊號則是借由外部系統透過線圈傳送到植入體內系統晶片。外部系統需要將控制訊號傳送到體內晶片,而體內系統採用4.5KHz的時脈訊號和資料做互斥或閘運算混合在一起,也就是所謂曼徹斯特編碼,藉由二元相位調變(BPSK Modulation)混入13.56MHz的載波上,透過功率放大器和線圈將二元相位調變訊號傳送到體內晶片,植入體內的晶片再透過體內接收線圈將二元相位調變訊號接收到13.56MHz射頻前端電路。橋式整流器將二元相位調變訊號由交流轉成直流來使用,由於這直流電源會受到接收功率強弱而使直流電源電位不穩定,所以需要串接一組線性穩壓器來將電位穩定在1.8V才能提供給後端電路使用。而控制訊號需要透過二元相位調變解調器將其解調變,接下來還需要將解調變訊號分離出4.5KHz的時脈訊號和資料,透過時脈/資料分離器將時脈和資料分離,以提供後端電路使用。
此晶片採用TSMC 0.18µm 1P6M CMOS製程實現,整體的晶片面積為1.183x1.143(mm2),總消耗功率為632µW。

Our research addresses the problem of implementing a 13.56MHz RF front-end circuit for the Body Sensor Network. The front-end circuits include a full-wave bridge rectifier, a linear regulator, a BPSK demodulator and a clock/data separator. The main function of the proposed 13.56MHz RF front-end batteryless circuit is to provide the Body Sensor Network power and control signals correctly, while the power and control signals are received from an external device. An external device can send their control signals with a 4.5KHz clock signal and a Manchester encoding signal according to the XOR operation of input signals of clock and data. The transmitted signals are modulated by BPSK with a 13.56MHz carrier. The implanted chip receives this 13.56MHz RF signal by an internal coil, hence a front-end circuit is required to pre-process the received signal. The power is created by using a full-wave bridge rectifier to convert the AC of the BPSK signal to DC voltage. Becuase the received AC power is unstable, a linear regulator is adopted to stabilize the DC voltage at 1.8V and provides the power for the back-end circuits. The control signals will be extracted by BPSK demodulator, then a 4.5KHz clock and data can be obtained by demodulation circuits. This chip is implemented in TSMC 0.18µm 1P6M CMOS process. The overall chip area is 1.183x1.143 mm2 under the power consumption of 632μW.
誌謝 i
摘要 iii
Abstract v
目錄 vii
圖目錄 ix
表目錄 xi
第1章 緒論 1
1.1節 研究動機 1
1.2節 論文編排 1
第2章 發射機之能量設計分析 3
2.1節 為何選13.56MHz 3
2.2節 選用天線、功率放大器和調變方式 4
2.3節 系統評估 6
第3章 接收射頻前端電路設計(RF Front-end Circuit) 11
3.1節 全波橋式整流器(Full-wave Bridge Rectifier) 12
3.1.1節 閘極和源極之間的電壓(VGS)壓差加大 14
3.1.2節 抑制漏電流 15
3.2節 線性穩壓器(Linear Regulator) 19
3.2.1節 參考電壓(Voltage Reference) 19
3.2.2節 線性穩壓器電路(Regulator) 22
3.3節 時脈/資料分離器(Clock/Data Separator) 29
3.4節 二元相位調變解調器(BPSK Demodulator) 39
3.4.1節 Manchester encoding由1變0 42
3.4.2節 Manchester encoding由0變1 45
3.4.3節 Power on reset(POR) 47
第4章 電路量測 49
4.1節 全波橋式整流器(Full-wave Bridge Rectifier)量測 52
4.2節 線性穩壓器(Linear Regulator)量測 56
4.2.1節 靜態測試(Static-state) 56
4.2.2節 動態測試(Dynamic-state) 59
4.2.3節 高頻測試(High frequency) 60
4.2.4節 靜態電流(Quiescent current) 62
4.3節 二元相位調變解調器(BPSK Demodulator)和時脈/資料分離器(Clock/Data Separator)量測 63
第5章 總結 67
參考文獻 70

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