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研究生:吳易熾
研究生(外文):WU,YI-CHIH
論文名稱:利用CMOS交叉偶合對設計平衡式表面聲波振盪器
論文名稱(外文):Design of Balanced SAW Oscillators By CMOS Cross-couple pairs
指導教授:高曜煌
指導教授(外文):YHKAO
學位類別:碩士
校院名稱:中華大學
系所名稱:電機工程學系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:中文
論文頁數:61
中文關鍵詞:表面聲波元件壓控振盪器Cross couple考畢子電路VCSO
外文關鍵詞:Surface Acoustic WaveVoltage Controlled Saw OscillatorCross coupleColpittsVCSO
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本論文主要是研究表面聲波壓控振盪器(Voltage Controlled Saw Oscillator-VCSO),內容分為兩大部分,第一部分是離散式電路,第二部份是CMOS電路。為了對VCSO有全盤瞭解,先製作離散式單端及雙端壓控振盪器,作為日後之比較用。採用工業界常見的考畢子電路,首先利用ADS軟體來模擬所設計的電路,並且對表面聲波元件作萃取Model,將表面聲波元件中的Model等效出來,再實現電路並量測其相位雜訊。離散式考畢子單端的最佳指數(Figure of merit-FOM)較雙端來的好,原因是使用一顆主動元件,但它沒有平衡輸出。
接著利用CMOS製程實現平衡式VCSO雙端輸出電路,採用交叉偶合對(Cross-couple)架構,使用獨立電流鏡克服拴鎖問題,IC利用台積電TSMC 0.18um CMOS製程實現,工作頻率於425MHz,輸出功率為-9.06dBm,核心消耗功率為4.88mW,頻率在1MHz時,可得相位雜訊-154 dBc/Hz,可調範寬為35ppm, FOM為200。研究指出利用交叉偶合對平衡式CMOS的起振時間優於平衡式的考畢子電路。

In this thesis, voltage-controlled surface acoustic wave oscillator (VCSO) is studied. The content is divided into two parts. The first is focused on discrete single-ended and balanced VCSO. The performances are used for further comparison with respect to integrate versions. The configuration of Colpitts circuit is employed. The function is designed by ADS software. The circuit is successfully implemented on pc board. The phase noise and tuning range are measured. It is concluded that single-ended is better than that of the balanced one on discrete case. The reason lies in only single active component.
The second part is the study of integrated VCSO by CMOS process. The VCSO with balanced output is achieved by Cross-couple Structure. The latch problem is overcome by using two independent current mirror sources. The VCSO is fabricated by using TSMC 0.18um CMOS process. The working frequency is at 425MHz with output power -9.06 dBm. The power consumption of core circuit is 4.88 mW. The phase noise at frequency offset 1MHz is -154 dBc/Hz. The frequency tuning is 35 ppm and the figure of merit is 200. The Balanced CMOS with cross-coupled configuration has shorter turn-on time than that in the discrete one with Colpitts configuration.

摘要 i
ABSTRACT ii
致謝 iii
圖目錄 v
表目錄 viii
第一章 序論 1
1-1研究動機 1
1-2研究方法 2
1-3論文架構 3
第二章 離散式表面聲波壓控振盪器設計 4
2-1表面聲波振盪電路之設計原理 4
2-1-1 表面聲波元件模組建構 5
2-1-2 壓控振盪電路原理 7
2-2 單端考畢子架構介紹 8
2-2-1 模擬一般單端考畢子架構 8
2-2-2 量測單端考畢子電路 10
2-3雙端考畢子電路架構 11
2-3-1 設計雙端考畢子電路原理 11
2-3-2 雙端考畢子電路模擬 12
2-3-3 雙端Colpitts量測結果 13
2-3-4模擬與量測的比較 14
第三章 CMOS平衡差動輸出振盪器之製作 15
3-1 電路設計原理 16
3-1-1小信號分析 18
3-1-2可調頻寬的預測 22
3-1-3可調頻寬預估 24
3-2-1 佈局平面設計 28
3-2-2 壓控振盪器設計流程 29
3-3 實際量測結果 30
3-3-1相位雜訊/振幅/功率/起振時間 30
3-3-2 模擬與量測比較 34
第四章 利用交叉偶合對改善考畢子平衡式振盪器的起振時間 35
4-1 一般單端與雙端考畢子架構簡介 35
4-2 具有cross couple Colpitts的Balances電路架構 36
第五章 結論 42
參考文獻 43
附錄 46

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