謝誌 8
LIST OF FIGURES 11
LIST OF TABLES 13
CHAPTER 1. INTRODUCTION 14
1.1. MOTIVATION 15
1.2. CONTRIBUTIONS 16
1.3. ORGANIZATION OF THE DISSERTATION 17
CHAPTER 2. BACKGROUND AND PREVIOUS WORK 18
2.1. MOTION SEARCH ALGORITHMS 18
2.2. HARDWIRED MOTION SEARCH 24
2.3. H.264/AVC VIDEO CODING STANDARD 27
CHAPTER 3. PROPOSED ALGORITHM – TRI-POINT SEARCH 31
3.1. INITIAL SEARCH PATTERN 31
3.2. THE SEARCH PATTERN IN THE FOLLOWING PROCEDURE 32
3.3. THE FINAL REFINEMENT SEARCH PATTERN 33
3.4. ANALYZING THE TRI-POINT SEARCH ALGORITHM 34
CHAPTER 4. VLSI ARCHITECTURE FOR PROPOSED ALGORITHM 37
CHAPTER 5. EVALUATION OF THE PROPOSED ALGORITHM 41
5.1. THE STATIC ANALYSIS 42
5.2. THE DYNAMIC ANALYSIS 44
5.3. THE ANALYSIS FROM MEMORY ACCESS ASPECT OF VIEW 48
CHAPTER 6. FAST HARDWARE ARCHITECTURE EXPLORATION FOR H.264 VARIABLE BLOCK-SIZE MOTION ESTIMATION 53
6.1. THE SYSTEM TO BE MODELED 53
6.2. BUILD THE TIMING MODEL 55
6.3. COLLECT THE MOTION SEARCH INFORMATION 56
6.4. EXECUTION OF THE MODEL 57
6.5. OTHER SYSTEM PROPERTIES 59
CHAPTER 7. EXPERIMENTS AND RESULTS 60
7.1. SCENARIO-A: EXPERIMENT ON VIDEO SEQUENCE TYPES 61
7.2. SCENARIO-B: EXPERIMENT ON BUS ARBITRATION STRATEGIES 62
7.3. SCENARIO-C: EXPERIMENT ON DIFFERENT NUMBER OF PUS AND WORKLOAD SHARING 64
7.4. SCENARIO-D: EXPERIMENT ON TWO MEMORY BUFFERS 65
7.5. SCENARIO-E: EXPERIMENT ON QP AND SEARCH ALGORITHMS 67
CHAPTER 8. ENHANCEMENT FOR THE H.264/AVC VBSME 70
8.1. DATA REUSE AND MOTION SEARCH STRATEGY 70
8.2. HARDWARE ARCHITECTURE EXPLORATION 71
8.3. SIMULATION RESULTS AND COMPARISONS 74
CHAPTER 9. CONCLUSION AND FUTURE WORK 77
9.1. IMAGE QUALITY IMPROVEMENT 77
9.2. SEARCH POSITION REDUCTION 79
9.3. PERFORMANCE EVALUATION MODEL ENHANCEMENT 81
REFERENCE 83
ABBREVIATION CROSS REFERENCE 89
VITA 90
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