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研究生:吳匯儀
論文名稱:應用於寬頻與超寬頻接收機之金氧半互補式非對稱源極電感退化之低雜訊放大器分析與設計
論文名稱(外文):Analysis and Design of a Novel CMOS Complementary Low Noise Amplifier using Asymmetrical Source Degeneration for Wideband and Ultra-Wideban Receiver
指導教授:周復芳
指導教授(外文):Jou, Christina F.
學位類別:博士
校院名稱:國立交通大學
系所名稱:電信工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:99
語文別:英文
論文頁數:92
中文關鍵詞:超寬頻低雜訊放大器寬頻雜訊阻抗匹配互補式
外文關鍵詞:Ultra-widabandlow noise amplifierwidebandnoiseimpedance matchingcomplementary
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由於共源極組態常被用於寬頻低雜訊放大器的設計。在此論文中,具備電阻-電感-電容(R-L-C)之共源極電路的輸入阻抗有完整的分析。基於共源極組態的知識,此論文題出一個創新的設計方法,此方法採用互補式電晶體架構搭配源極退化電感,其可達到寬頻的輸入阻抗匹配與低雜訊指數。模擬的輸入阻抗與理論預測的輸入阻抗非常相近,此驗證了輸入阻抗的分析的正確性。此創新架構的雜訊指數也被正確的分析解釋與探討。此外,對於互補式組態的優劣在文中也被公平的探討與比較。為了驗證此電路的可行性,三顆寬頻匹配低雜訊放大器以台積電0.18um之CMOS製程來設計:其中兩個電路頻段是3-10GHz,另一個是8-25GHz。值得注意的是,互補式寬頻低雜訊放大器有20dB增益, 2.4–3.4dB 雜訊指數並消耗了 25.65mW之功率消耗,當與其他寬頻低雜訊放大器做比較,此電路有非常好的效能與優化指數(FOM)。最後,基於此篇論文的架構,我們提出了一個新型的共源極電路,此電路在70-100GHz可以降低雜訊指數達2-4dB之多。 因此此論文所提出的技術也能夠應用在毫米波的系統之中。
Since common-source topology is frequently adopted to design a wideband LNA. In this dissertation, input impedance of a common-source transistor circuit with R-L-C loading network is completely analyzed. Based on the knowledge of the common source topology, this dissertation proposes a novel LNA design method where the complementary transistor topology is combined with asymmetrical inductive source degeneration to achieve matched input impedance and low noise figure over a wide bandwidth. The validity of this new approach is supported by the agreement between the simulated input impedance of the LNA and their calculated counterpart. Also, the noise figure of the newly proffered topology is accurately analyzed and well explained. And, the pros and cons of the complementary topology are fairly addressed. To demonstrate the feasibility, three wideband matched LNA’s are designed using TSMC 0.18-μm RF-CMOS process: two are for 3−10GHz application and the other 8−25GHz. Specifically, the ultra-wideband complimentary LNA has superior performance: matched input impedance, 20dB power gain, and 2.4–3.4dB noise figure, with 25.65mW power consumption. Compared with other CMOS LNA’s, the proposed complimentary LNA has superior performance. Finally, to demonstrate the proposed input matching technique is suitable in millimeter wave applications, we propose a modified source inductively generated common-source transistor circuit, which can greatly improve the noise figure up to 2-4dB at W-band (70-110GHz) compared to the conventional source inductive degenerated common-source amplifier with a gate inductor.

Chapter 1 Introduction 1
1.1 Background and Motivation 1
1.2 Wideband Amplifier Review 4
1.2 Thesis Organization 14
Chapter 2 Wideband Matched CMOS LNA Design Using R-L-C Loading Network 16
2-1 Introduction 16
2-2 Analysis of Wideband LNA Design 19
2-3 Wideband LNA Design 28
Chapter 3 Analysis and Design of Complementary Ultra-Wideband LNA Using Asymmetrical Inductive Source Degeneration 36
3-1 Introduction 38
3-2 Input Matching Analysis 38
3-3 Noise Analysis 54
3-4 LNA Design and Experimental Result 63
Chapter 4 Future Work 71

Appendix I 74
Appendix II 79
Bibliography 84
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