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研究生:周福興
研究生(外文):Fu-Hsing Chou
論文名稱:不同佈局薄膜電容分析與玻璃基板覆晶之功率放大器設計
論文名稱(外文):A Study of Thin-film Capacitor Layout and Power Amplifier Integrated with Passive Devices on Glass
指導教授:辛裕明
指導教授(外文):Yue-Ming Hsin
學位類別:碩士
校院名稱:國立中央大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:中文
論文頁數:104
中文關鍵詞:薄膜電容去嵌入法功率放大器玻璃基板
外文關鍵詞:power amplifierde-embeddingMIM capacitorglass substrate
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本論文第一個部分是分析探討在單石微波積體電路設計中所常用的薄膜電容在相同單位面積下改變佈局設計的高頻特性,以了解何種形式下的薄膜電容能夠達到最佳的共振頻率。論文中薄膜電容製作是利用半導體製程將其製作於砷化鎵基板上,並設計了十一種薄膜電容佈局形式且固定面積為100 × 100μm2。為了得到其精確的共振頻率及品質因素特性,在論文中介紹四種去嵌入法,藉由量測與模擬結果可知二階段開路/直通去嵌入法與探針墊/開路/直通去嵌入法較適用於薄膜電容。
而第二個部分則是探討藉由國家晶片中心(National Chip Implementation Center)所提供的玻璃基板整合式被動元件(Glasses Integrated Passive Device, GIPD)製程,透過覆晶封裝技術(Flip-Chip)將玻璃基板上的被動元件與台積電 0.18 μm CMOS製程所設計的驅動/功率級串疊式元件(Cascode MOSFET)晶片整合為一1.8 GHz差動Class-E 功率放大器。此電路架構的主要特色在於將被動元件製作在高絕緣度的玻璃基板上,藉此改善以往被動元件製作於矽基板上所造成的基板損失與以往打線(wire bonding)造成的寄生電感所產生的寄生效應,使得飽和功率(saturation power)與功率附加增益(power added efficiency)能有所提升。
The first part of this thesis is to study the high frequency performance of thin-film capacitor in different geometry with the same layout area and to investigate which capacitor can achieve the best self-resonant frequency for the monolithic microwave integrated circuit (MMIC) circuit design. The thin-film capacitors were fabricated on GaAs substrate by using semiconductor process. There are different layout styles, 11 types in total, were designed into an unit area of 100 × 100μm2. In order to obtain the precisely characteristics of self-resonant frequency and quality factor, the thin-film capacitors including RF pads were extracted by using de-embedding method. Four de-embedding method are introduced in the thesis. Based on the results from measurement and simulation, the de-embedding methods, 2-step/open/thru and the pad/open/thru, are suitable for the thin-film capacitance extraction.
The second part presents a differential-type Class-E power amplifier for 1.8 GHz wireless application in which the amplifier was integrated by a chip having a driving and a power cascode MOSFETs designed by TSMC 0.18μm CMOS technology and the passive components based on Glasses Integrated Passive Device(GIPD) process. This circuit architecture not only avoids the parasitic inductors from bonding wire but also reduces the loss of the passive components on silicon substrate. Because of the improvement using GIPD technique, the saturation power and the power added efficiency therefore can be enhanced in power amplifier design.
摘要..... IV
Abstract. V
致謝..... VI
圖目錄... IX
表目錄... XIV
第一章 導論..... 1
1.1研究動機與目的. 1
1.2被動元件發展現況........ 4
1.3 Class-E 功率放大器研究發展現況.. 5
1.4論文架構....... 8
第二章 不同佈局形式之薄膜電容特性. 9
2.1簡介.. 9
2.2去嵌入式方法(de-embedding method) 9
2.2.1 二階段開路/短路去嵌入法(2 step Open/short de-embedding method). 10
2.2.2 探針墊/開路/短路去嵌入法(Pad/Open/Short de-embedding method).. 13
2.2.3 二階段開路/直通去嵌入法(2 step Open/Thru de-embedding method). 18
2.2.4 探針墊/開路/直通去嵌入法(Pad/Open/Thru de-embedding method).. 21
2.3不同佈局形式薄膜電容設計 27
2.3.1 薄膜電容基本介紹..... 27
2.3.2 薄膜電容佈局設計..... 29
2.3.3 薄膜電容製作流程..... 34
2.4不同佈局形式薄膜電容特性分析..... 38
2.4.1 不同佈局形式薄膜電容值萃取流程 38
2.4.2 不同佈局形式薄膜電容模擬與量測結果..... 40
2.5並聯型式薄膜電容特性分析 .47
2.6結論.. 50
第三章 與玻璃基板覆晶之差動串疊式Class-E功率放大器.. 51
3.1簡介.. 51
3.2 Class-E功率放大器操作原理....... 52
3.3玻璃基板整合式被動元件(Glasses Integrated Passive Device)製程簡介... 54
3.4電路設計....... 56
3.4.1差動串疊式Class-E放大器電路架構 56
3.4.2被動元件佈局考量...... 62
3.4.3電路模擬與量測........ 63
3.5結論.. 81
第四章 結論..... 82
參考文獻. 83
附錄A 口試問題回答 86
[1]R. K. Ulrich and L. W. Schaper, “Integrated Passive Component Technology ”: Wiley, 2003.
[2]蘇炫銘, “整合式被動元件之特性分析與應用 ” 碩士論文, 國立高雄大學, 2007.
[3]翁敏航, “射頻被動元件設計,” 東華書局, 2006.
[4]李采慈, “薄膜製程射頻被動元件設計,” 碩士論文, 國立中央大學, 2009.
[5]L. Chi-Hsien and C. Hong-Yeh, “A High Efficiency Broadband Class-E Power Amplifier Using a Reactance Compensation Technique,” IEEE Microwave and Wireless Components Letters, vol. 20, no. 9, pp. 507-509, Sep. 2010.
[6]S. Yonghoon, L. Sungho, E. Cho, L. Jaejun, and N. Sangwook, “A CMOS Class-E Power Amplifier With Voltage Stress Relief and Enhanced Efficiency,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 2, pp. 310-317, Feb. 2010.
[7]A. Kyu Hwan, L. Dong Ho, L. Ockgoo, K. Hyungwook, H. Jeonghu, K. Woonyun, L. Chang-Ho, K. Haksun, and J. Laskar, “A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control,” IEEE Microwave and Wireless Components Letters, vol. 19, no. 7, pp. 479-481, Jul. 2009.
[8]R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications,” IEEE Journal of Solid-State Circuits, , vol. 43, no. 8, pp. 1755-1762, Aug. 2008.
[9]林柏安, “使用覆晶技術之微波與毫米波積體電路 ” 碩士論文, 國立中央大學, 2010.
[10]楊立群, “低溫共燒陶瓷嵌入式電感與電容元件之設計與模型化,” 碩士論文, 中山大學, 2002.
[11]M. C. A. M. Koolen, J. A. M. Geelen, and M. P. J. G. Versleijen, “An improved de-embedding technique for on-wafer high-frequency characterization,” in IEEE Bipolar Circuits and Technology Meeting, pp. 188-191, Sep. 1991.
[12]T. E. Kolding, “On-wafer calibration techniques for giga-hertz CMOS measurements,” in IEEE Microelectronic Test Structures (ICMTS), pp.105-110, Mar. 1999.
[13]C. Junyoung, C. Jiyong, and L. Seonghearn, “Uncertainty Analysis of Two-Step and Three-Step Methods for Deembedding On-Wafer RF Transistor Measurements,” IEEE Transactions on Electron Devices, vol. 55, no. 8, pp. 2195-2201, Aug. 2008.
[14]M. Drakaki, A. A. Hatzopoulos, and S. Siskos, “De-embedding method for on-wafer RF CMOS inductor measurements,” Elsevier Microelectronics Journal, vol. 40, no. 2, pp. 958-965, Feb. 2009.
[15]吳瑞峰, “氧化鋁基板上積體化被動元件及其微波電路設計與研製 ” 碩士論文, 國立中央大學, 2002.
[16]I. Bahl, “Lumped Elements for RF and Microwave Circuits,” Artech House, 2003.
[17]D. M. Pozar, “Microwave engineering ” 3/e ed., 2006.
[18]T. King-Chun and P. R. Gray, “A 1.9-GHz, 1-W CMOS class-E power amplifier for wireless communications,” IEEE Journal of Solid-State Circuits, vol. 34, no. 7, pp. 962-970, Jul. 1999.
[19]Y. Changsik and H. Qiuting, “A common-gate switched 0.9-W class-E power amplifier with 41% PAE in 0.25-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 36, no. 5, pp. 823-830, May. 2001.
[20]S. C. Cripps, “RF Power Amplifiers for Wireless Communications,” Artech House, 1999.
[21]M. Acar, A. J. Annema, and B. Nauta, “Analytical Design Equations for Class-E Power Amplifiers,” IEEE Transactions on Circuits and Systems, vol. 54, no. 12, pp. 2706-2717, Dec. 2007.
[22]何岳龍, “高效率與線性度的功率放大器設計,” 碩士論文, 中央大學, 2002.
[23]蔡翊翔, “微波功率放大器線性度改善研究,” 碩士論文, 中央大學, 2010.
[24]A. Mazzanti, L. Larcher, R. Brama, and F. Svelto, “Analysis of reliability and power efficiency in cascode class-E PAs,” IEEE Journal of Solid-State Circuits, vol. 41, no. 5, pp. 1222-1229, May. 2006.
[25]L. Ockgoo, H. Jeonghu, A. Kyu Hwan, L. Dong Ho, L. Kun-Seok, H. Songcheol, and L. Chang-Ho, “A Charging Acceleration Technique for Highly Efficient Cascode Class-E CMOS Power Amplifiers,” IEEE Journal of Solid-State Circuits, vol. 45, no. 10, pp. 2184-2197, Oct. 2010.
[26]P. Arora, J. Mukherjee, and V. Agarwal, “Performance analysis of CMOS Mode Locked class E Power Amplifier,” in 2010 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) , pp. 905-908, Aug. 2010.
[27]S. Datta and H. Saha, “A 950-MHz fully differential class-E power amplifier in 0.18μm CMOS for wireless communications,” in Emerging Trends in Electronic and Photonic Devices & Systems , pp. 88-91, Apr. 2009.
[28]S. Ping and H. Cam Luong, “A 1.0-V 15.6-dBm 39.5%-PAE CMOS Class-E Power Amplifier with On-Chip Transformer for Q Enhancement,” in Asian Solid-State Circuits Conference, pp. 141-144, 2005.
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