本論文研究部分空乏矽覆絕緣金氧半場效電晶體元件進行負偏壓溫度不穩定性(NBTI)的物理機制的研究。閘極引發基板效應”Gate-Induced Floating Body Effect (GIFBE)” 對於NBTI的影響導致Floating Body (FB)元件的起始電壓(threshold voltage)劣化較Body Contact (BC)元件來得輕微，是由於FB元件的操作會在基板端累積載子，進而影響閘極氧化層的電場，使得NBTI之現象減緩。而由實驗可知，基板端累積之載子來源是由n+ poly-gate直接穿隧的電子與AEI(Anode electron injection)機制所產生之電子。
此外將引入機械應力(mechanical strain)探討其對於NBTI劣化的影響，無論是BC或FB元件，在施加應力之後其NBTI可靠度皆有提升現象，是由於外界應力(mechanical strain)的施加，導致電洞有效質量變大及所遇到之位障變高，故IG下降而降低與SI-H反應的機率，使NBTI劣化變輕微，對於FB元件在Strain過後矽的能隙窄化(Band gap narrowing)增加AEI機制之碰撞游離率而產生更多電子累積在基板端，因此比起BC元件更加減低NBTI之劣化效應。
然而在NBTI實驗過程中施加汲極端偏壓，造成汲極端橫向電場拉扯，降低電洞與SI-H的反應時間，使NBTI的劣化程度隨著施加汲極端偏壓越大而降低，但在施加較大的汲極端偏壓(VD>-1V)下會因較大的電流使SOI元件產生自熱現象，而加劇NBTI的劣化現象。

This work investigates the influence of gate-induced floating body effect (GIFBE) on negative bias temperature instability (NBTI) in partial depleted silicon-on-insulator p-type metal-oxide-semiconductor field effect transistors (PD-SOI p-MOSFETs). The results indicate GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of NBTI degradation. This can be attributed to the electrons tunneling from the process-induced partial n+ poly gate, and at higher voltages is dominated by the proposed anode electron injection (AEI) model.
Moreover, when introducing the mechanical strain to PD-SOI p-MOSFETs result in decreasing the NBTI degradation for BC and FB devices, because increase of effective mass of hole and barrier height to decrease the probability of reaction of NBTI. The degradation of NBTI on FB device less than BC device because of strain-induced band gap narrowing to substrate and p+ poly gate, resulting in the rising of rate of impact ionization in AEI model to increase the accumulation of electrons on body.
After that, giving the drain voltage in NBTI stress, the threshold voltage, Vth, shift decreases as drain voltage (VD) rising within the stress condition of VD= -1V. This phenomenon can be attributed to the shorter effective reaction time of hole and Si-H bonds after applying drain voltage during NBTI stress. However, beyond the condition at VD= -1V, the Vth shift rises as the drain voltage increasing. This behavior is resulted from the self-heating effect induced by the higher stress VD to increase the degradation of NBTI.

Thesis oral examination committee members approval sheet……….…i
Acknowledgement...………………………………………………………ii
Chinese abstract..…………………………………………………….…..iii
English abstract……………………………………..……………………iv
Figure Caption……………………………………..……………………vii
Chapter 1 Introduction
1-1 Background to the Semiconductor Device……………….…...…………………......1
1-2 Motivation……………….…………………………………………………………..1
1-3 Strain Technology..………………………………………………………………….3
Chapter 2 Foundation of Theory
2-1 SOI MOSFET….……………………………………………………………………7
2-2 Negative Bias Temperature Instability (NBTI)…....………………………………..8
2-2-1 the principle of NBTI.…………………………………..……...……………..8
2-2-2 Description of the R–D model...……………...……………………………...9
2-3 Gate Induced Floating Body Effect (GIFBE)………………………..………………9
2-4 Pulse I-V….………………………...………………………………………………10
Chapter 3 Experiment step and Parameters
3-1 Steps of Experiments…………………………………...…………………………..16
3-1-1 Preparation before Experiments………………....………………….………..16
3-1-2 The setting of the measurement….…………………………………...……...16
3-1-3 Polish the sample……….……………………………..…………………..…17
3-1-4 In applying Drain Voltage within NBTI stress.…………………..………..…18
3-2 Parameter....…………………………………………………...……………………18
3-3 Measurement machine...……………………………………………………………19
Chapter 4 Results and Discussion
4-1 Introduction of SOI sample in my experiment...……………………………..…….24
4-2 Gate-Induced Floating Body Effect on NBTI degradation in PD SOI p-MOSFETs……...………………………………………………………………25
4-3 Impact of Mechanical Strain on NBTI Degradation in PD SOI p-MOSFETs…..…28
4-4 Drain Voltage Dependence on NBTI Degradation in PD SOI p-MOSFETs……....30
Chapter 5 Conclusion……..………………………….…….…………...52
Reference..…………………...…………………………………….……..54

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