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研究生:林裕彬
研究生(外文):Yu-bin Lin
論文名稱:多參數設計之可程式化生醫訊號紀錄前端放大器
論文名稱(外文):Design of a programmable multi-parameter amplifier front-end for bio-potential recording
指導教授:勞伯特律格
指導教授(外文):Robert Rieger  
學位類別:碩士
校院名稱:國立中山大學
系所名稱:電機工程學系研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:英文
論文頁數:90
中文關鍵詞:超大型積體電路低功率生醫訊號BiCMOS雙差動放大器
外文關鍵詞:double-differential amplifierVLSIBiCMOSlow powerphysiological signals
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隨著超大型積體電路製程技術的進步,家庭醫療器材的應用也越來越熱門。然而,低雜訊與低功率是可攜式晶片必須面對的兩大因素。首先,由於生醫訊號的振幅只有幾毫伏特或更小,因此,極容易受到雜訊的干擾,假如不能有效的抑制雜訊,此系統將無法精確的放大生醫訊號並獲得合適的電壓輸出。第二,經常地更換電池,對長時間使用可攜式生醫訊號量測儀器的病患造成諸多困擾。接著,本論文將重心集中在生醫訊號的量測,例如:心電圖(ECG)、神經電圖 (ENG)、肌電圖 (EMG),並設計一顆可同時量測不同生醫訊號的晶片。我們在系統中設計了可記錄不同生醫訊號的可程式化暨多參數放大器。首先,它提供BiCMOS 和CMOS 兩種轉導輸入級。BiCMOS 放大器提供了高增益、低雜訊、低偏移電壓等優點,並應用在振幅較小的生醫訊號。相反的,CMOS 放大器提供了低功率消耗、輸入阻抗無限大、極低漏電流等優點。第二,此系統提供了三種放大器的選擇:雙差動放大器、使用「通道1」的單一差動放大器、使用「通道2」的單一差動放大器。雙差動放大器提供了生醫記錄系統具有高共模拒斥比,並可分別調整各通道放大器的增益並降低共模雜訊的干擾。除此之外,此系統也保留了單一差模訊號放大器的使用。第三,此系統提供了偏壓補償功能以避免放大器的輸出超過系統的動態範圍,同時,偏壓補償功\能可以在停止使用時關閉以降低功率消耗。
Home medical equipment becomes increasingly popular as VLSI fabrication technology advances. However, there are two important factors for realizing a miniaturized biochip: low noise [1] and low power. Firstly, physiological signals are very susceptible to interference while the amplitude of the signal is only a few millivolts or less. If the circuit cannot reject noise effectively, it is hard to amplify the signal and obtain the output voltage of the recording system accurately. Secondly, it is not convenient to replace the batteries frequently when using the portable measurement instrument for the patients. This thesis is focused on the measurement of physiological signals, such as electrocardiography (ECG) [2], electroneurogram (ENG) [3] and electromyography (EMG) [4] , and designing an all-in-one recording system to measure the different physiological signals in a chip. For this purpose, a programmable multi-parameter system for recording of the wide range of physiological signals is designed. The system provides two types of input transconductance stages, BiCMOS and CMOS. BiCMOS amplifiers provide high gain , low noise [5] and low offset voltage suitable for the small amplitude of the physiological signal. On the other hand, CMOS amplifiers provide practically infinite input impedance and ultra-low leakage current. The system also provides three selectable amplifier modes: (a) double-differential amplifier, (b) single-differential amplifier in channel 1, (c) single-differential amplifier in channel 2. The double-differential amplifier provides a high common-mode rejection and adjustable gain for each channel to further reduce common-mode interference. The single-differential amplifier (channel 1 or channel 2) in the recording system are also accessible as differential-input and single-ended output channels. Moreover, the system provides an offset compensation structure to prevent the amplifier from exceeding the input range. The offset compensation system can selectively be turned off to reduce the power consumption.
摘要 ............................................................................................................................... i
Abstract ...................................................................................................................... ii
Contents ....................................................................................................................... iv
List of Figures ............................................................................................................. vii
List of Tables ............................................................................................................. xiii
Chapter 1 Introduction .................................................................................................. 1
1.1 Motivation ............................................................................................... 1
1.2 Contribution ............................................................................................ 4
Chapter 2 Proposed System and Related Work .............................................................. 6
2.1 System description ................................................................................... 6
2.2 Related work.......................................................................................... 10
2.2.1 A high-gain acquisition system with very large input range ......... 10
2.2.2 A high-gain CMOS amplifier for sampled bio-potential recording ...
............................................................................................................ 11
Chapter 3 System Implementation ............................................................................... 14
3.1 Background ........................................................................................... 14
3.1.1 Using the MOS transistor as a switch .......................................... 14
3.1.2 Current mirror ............................................................................. 17
3.1.3 Differential input operational transconductor amplifiers .............. 18
3.1.4 Current integrator ........................................................................ 20
3.1.5 Double-differential amplifier ....................................................... 22
3.2 Circuit description of proposed system................................................... 24
3.2.1 Multi-parameter amplifier ........................................................... 24
3.2.1.1 BiCMOS input transconductance stage ............................. 26
3.2.1.2 CMOS input transconductance stage ................................. 28
3.2.2 Single-differential amplifier ........................................................ 29
3.2.2.1 Current integrator and sample-and-hold circuit ................. 30
3.2.2.2 Buffer ............................................................................... 32
3.2.3 Double-differential amplifier ....................................................... 33
3.2.3.1 Bias current block ............................................................. 35
3.2.4 Offset compensation system ........................................................ 36
3.2.4.1 Multiplexer ....................................................................... 37
3.2.4.2 Digital circuits .................................................................. 38
3.2.4.3 Bias current block ............................................................. 40
3.2.4.4 Floating battery and DAC ................................................. 41
3.2.4.5 Comparator ....................................................................... 42
Chapter 4 Simulated Results ....................................................................................... 44
4.1 BiCMOS/CMOS input transconductance stage .................................... 44
4.2 Current integrator .................................................................................. 45
4.3 Buffer .................................................................................................... 45
4.4 Double-differential (DD)/single-differential (SD) amplifier .................. 46
4.5 Comparator .......................................................................................... 53
4.6 Digital counter ..................................................................................... 53
4.7 DAC .................................................................................................... 55
4.8 Offset compensation in double-differential amplifier ............................ 56
4.9 Layout ................................................................................................... 58
Chapter 5 Measured Results ........................................................................................ 59
5.1 Measured amplifier gain ........................................................................ 61
5.2 CM rejection using double-differential configuration ............................. 64
5.3 Gain versus Td plot for BiCMOS and CMOS amplifier ......................... 65
5.4 Transfer gain using BiCMOS and CMOS amplifier................................ 66
5.5 Functionality test of the offset compensation system .............................. 67
Chapter 6 Conclusions and Future Work ..................................................................... 70
Reference .................................................................................................................... 72
List of publications ..................................................................................................... 75
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