臺灣博碩士論文加值系統

在此篇論文中，我們藉由鋅元素多重能量佈植隔絕的方式，在矽基板上製作了氮化鋁鎵/氮化鎵高電子遷移率電晶體，有效降低元件之間漏電流及內部漏電流，當元件通道長度3μm，閘極至汲極長度7μm，獲得不錯的電流開關比(Ion/Ioff=6.2×106)及次臨限斜率(St=112 mV/dec)。且利用閘極場平板來降低閘極區域峰值電場，達到更優越的崩潰電壓。量測結果顯示，通道長度3μm，閘極至汲極長度40μm，閘極場平板長度2μm的元件，最高崩潰電壓約為2300V，而此元件的導通電阻為14.8mΩ-cm2，其評比效能BFOM值為372.8 MW/cm2。最佳評比效能BFOM值的元件為664 MW/cm2，其崩潰電壓為1609V，通道長度3um，閘極至汲極長度20μm，閘極場平板長度2μm的元件，導通電阻為3.9 mΩ．cm2。

In this research, AlGaN/GaN high electron mobility transistors were fabricated on a silicon substrate. Isolation between devices was achieved by multi-energy Zn implantation, significantly suppressing the leakage current within and between devices. The on/off current ratio for the device with 3μm Lch and 7μm LGD is 6.2×106 and the subthreshold slope is 112 mV/dec. Gate field plates were applied in order to obtain high breakdown voltages. Measurements show that, for the device with 3μm Lch, 40μm LGD, and 2μm gate field plate, the maximum breakdown voltage is around 2300 V, while the on-resistance is 14.8mΩ-cm2. The BFOM is 372.8M W/ cm2 for this device. For the device with the highest BFOM of 664MW/cm2, the breakdown voltage is 1609 V and the on-resistance is 3.9 mΩ．cm2. The channel length is 3μm, the gate to drain spacing is 20μm, and the gate field plate is 2μm.

目錄
中文摘要 I
Abstract II
致謝 III
目錄 IIV
圖目錄 VI
表目錄 IX


第一章 序論
1.1 前言-----------------------------------------------------------------------1
1.2 文獻回顧與研究動機--------------------------------------------------2
1.3 研究方向簡介與論文架構--------------------------------------------7

第二章 元件介紹與設計
2.1 氮化鋁鎵/氮化鎵材料介紹-----------------------------------------13
2.2 基板選擇---------------------------------------------------------------14
2.3 場平板結構------------------------------------------------------------15
2.4 保護層對氮化鋁鎵的影響------------------------------------------16
2.5 元件光罩設計---------------------------------------------------------16

第三章 元件製作
3.1高電壓AlGaN/GaN HEMT流程--------------------------------------23
3.2 元件磊晶結構-----------------------------------------------------------23
3.3蝕刻對準記號------------------------------------------------------------24
3.4歐姆接觸製作------------------------------------------------------------25
3.5元件隔離製作------------------------------------------------------------26
3.6保護層沉積---------------------------------------------------------------27
3.7閘極金屬及Pad金屬----------------------------------------------------28
第四章 元件量測結果分析
4.1電流-電壓量測與分析---------------------------------------------------36
4. 2導通電阻和接觸電阻分析---------------------------------------------38
4. 3元件對溫度變化分析---------------------------------------------------39
4. 4 current collapse及切換特性-------------------------------------------40
4. 5元件崩潰電壓量測------------------------------------------------------41

第五章 結論與未來工作
5.1結論與未來工作----------------------------------------------------------60

參考文獻------------------------------------------------------------------------61

圖目錄

圖1.1 重疊式閘極結構圖------------------------------------------------------8
圖1.2 多層場平面(a)結構圖(b)電場分佈圖---------------------------------9
圖1.3 AlN passivation and via-holes through substrate結構--------------10
圖1.4Fluoride Plasma Treatment device(a) Treatment前能帶圖
(b)Treatment後能帶圖(c)結構圖----------------------------------10
圖1.5 p-type GaN gate contact 結構-----------------------------------------11
圖1.6堀入式閘極結構---------------------------------------------------------11
圖1.6 Recessed MIS Gate結構------------------------------------------------12
圖2.1 Wurtzite結構圖----------------------------------------------------------19
圖2.2 GaN Ga-face晶格結構圖----------------------------------------------19
圖2.3 壓電極化效應示意圖--------------------------------------------------20
圖2.4 場平板電場分佈圖-----------------------------------------------------20
圖2.5 不同PECVD RF功率對電流衰退比--------------------------------21
圖2.6 (a)光罩佈局設計(b)正式元件layout圖(c)元件流程圖-----------21
圖3.1高壓AlGaN/GaN HEMT製作流程圖--------------------------------31
圖3.2高壓元件不同燒結溫度對接觸電阻作圖---------------------------33
圖3.3高壓元件 RTA升溫曲線圖--------------------------------------------34
圖3.4模擬佈植深度及濃度---------------------------------------------------34
圖3.5片電阻對不同PECVD電漿功率作圖-------------------------------35
圖3.6 高壓元件完成圖--------------------------------------------------------35
圖4.1 佈植隔離與mesa隔離漏電流比較圖-------------------------------45
圖4.2 LG=3μm LGD=7μm 時 Ids-Vd特性曲線圖-------------------------45
圖4.3 LG=5μm LGD=7μm 時 Ids-Vd特性曲線圖-------------------------46
圖4.4 LG=3μm LGD=7μm時IDS-VGS特性曲線圖-------------------------46
圖4.5 LG=5μm LGD=7μm時IDS-VGS特性曲線圖-------------------------47
圖4.6高壓元件臨界電壓分佈圖---------------------------------------------47
圖4.7不同LG的 ID,max及Gm比較圖-----------------------------------------48
圖4.8LG=3μm及LGD=7μm的 I對VGS作圖-----------------------------48
圖4.9GaN/AlGaN/GaN結構與AlGaN/GaN結構能帶圖----------------49
圖4.10不同LGD長度導通電阻分佈圖--------------------------------------49
圖4.11TLM量測元件金屬接觸電阻----------------------------------------50
圖4.12比較不同溫度時的導通電阻-----------------------------------------50
圖4.13比較不同溫度時的飽和電流-----------------------------------------51
圖4.14比較不同溫度時的轉移電導-----------------------------------------51
圖4.15比較不同溫度時的IDS、IGS -------------------------------------------52
圖4.16蕭基能障對溫度的關係-----------------------------------------------53
圖4.17current collapse測試---------------------------------------------------53
圖4.18切換特性量測及負載線示意圖--------------------------------------54
圖4.19f=100KHz Duty=20%時的切換特性--------------------------------55
圖4.20高壓量測系統示意圖--------------------------------------------------55
圖4.21isolation 崩潰測試比較圖--------------------------------------------56
圖4.22崩潰電壓對不同LGD作圖--------------------------------------------56
圖4.23元件崩潰的情況--------------------------------------------------------57
圖4.24元件閘極區域剖面圖 ------------------------------------------------57
圖4.25LGD=40μm崩潰時的IDS及IGS --------------------------------------58
圖4.26崩潰電壓對不同LGFP關係--------------------------------------------58
圖4.27崩潰電壓對不同LDFP關係--------------------------------------------59

[1] T. P. Chow and R. Tyagi, “Wide bandgap compound semiconductors for superior high-voltage unipolar power devices,” IEEE Trans. Electron Devices, vol. 41, no. 8, pp. 1481–1483, Aug. 1994.
[2] J. Liu, Y. G. Zhou, R. M. Chu, Y. Cai, K. J. Chen, and K. M. Lau, “Highly linear Al0.3Ga0.7N/Al0.05Ga0.95N/GaN composite-channel HEMTs,” IEEE Electron Device Lett., vol. 26, no. 3, pp. 145–147, Mar. 2005.
[3] M. Kanamura, T. Kikkawa, T. Iwai, K. Imanishi, T. Kubo, and K. Joshin, “An over 100 W n-GaN/n-AlGaN/GaN MIS-HEMT power amplifier for wireless base station applications, ” in Proc. Tech. Dig. Int. Conf. Electron Devices, Washington, DC, Dec. 4–7, pp. 572–575, 2005.
[4] E. Frayssinet, W. Knap, P. Lorenzini, N. Grandjean, J. Massies, C. Skierbiszewski, T. Suski, I. Grzegory, S. Porowski, G. Simin, X. Hu, M. Asif Khan, M. S. Shur, R. Gaska, and D. Maude, “High electron mobility in AlGaN/GaN heterostructures grown on bulk GaN substrates, ” Applied Physics Lett., vol.77, no. 16, Oct. 2000.
[5] A. Khan, J. N. Kuznia, J. M. Van Hove, N. Pan, and J. Carter. “Observation of a two-dimensional electron gas in low pressure metalorganic chemical vapor deposited GaN-AlGaN heterojunctions,” Applied Physics Lett., vol.60, no. 24, pp. 3027–9, 1992.
[6] Y. F. Wu, B. P. Keller, S. Keller, D. Kapolnek, P. Kozodoy, S. P. Denbaars, and U. K. Mishra, “Very high breakdown voltage and large transconductance realized on GaN heterojunction field effect transistors, ” Applied Physics Lett., 69, pp. 1438-1440, 1996.
[7] S. Yoshida , H. Ishii, J. Li, D. Wang and Masakazu, “A high-power AlGaN/GaN heterojunction field-effect transistor,” Solid-State Electronics, vol. 47, Issue 3, pp. 589–592, Mar. 2003.
[8] N. Q. Zhang, S. Keller,G. Parish, S. Heilman, S. P. DenBaars, and U. K. Mishra, “High breakdown GaN HEMT with overlapping gate structure,” IEEE Electron Device Lett., vol. 21, no. 9, pp. 421–423, Sep. 2000.
[9] H. Xing, Y. Dora, A. Chini, S. Heikman, S. Keller, U. K. Mishra, “High breakdown voltage AlGaN-GaN HEMTs achieved by multiple field plates,” IEEE Electron Device Letters, vol 25, no 4, pp 161-163, April 2004.
[10] Y. Dora, “Understanding material and process limits for high breakdown voltage AlGaN/GaN HEMTs,” PhD thesis, University of California, Santa Barbara, 2006.
[11] Y. Dora, A. Chakraborty, L. McCarthy, S. Keller, S. P. DenBaars, and U. K. Mishra “High Breakdown Voltage Achieved on AlGaN/GaN HEMTs With Integrated Slant Field Plates,” IEEE Electron Device Lett., vol. 27, no. 9, pp. 713–715, Sep. 2006.
[12] Y. Uemoto, D. Shibata, M. Yanagihara, H. Ishida, H. Matsuo, S. Ngai, N. Batta, M. Li, T. Ueda, T. Tanaka, and D. Ueda, “8300V Blocking Voltage AlGaN/GaN Power HFET with Thick Poly-AlN Passivation,” IEDM Tech Dig., pp. 861-864 , 2007.
[13] P. Moens, G. Van den bosch, “Reliability assessment of integrated power transistors: Lateral DMOS versus vertical DMOS,” Microelectronics Reliability, vol. 48, no.8-9, pp.1300-1305, 2008.
[14] J. Shi, Y. C. Choi, M. Pophristic, M. G. Spencer, and L. F. Eastman, “High breakdown voltage AlGaN/GaN heterojunction field effect transistors on sapphire,” Physics Solid-State, c.5, No. 6, pp. 2013–2015. , 2008.
[15] S. Yagi, M. Shimizu, M. Inada, Y. Yamamoto, G. Piao, H. Okumura, Y. Yano, N. Akutsu, H. Ohashi, “High breakdown voltage AlGaN/GaN MIS–HEMT with SiN and TiO2 gate insulator,” Solid-State Electronics, vol.50, pp. 1057–1061, 2006.
[16] Y. Cai, Y. G. Zhou, and K. M. Lau, “Control of Threshold Voltage of AlGaN/GaN HEMTs by Fluoride-Based Plasma Treatment: From Depletion Mode to Enhancement Mode,” IEEE Electron Device Lett., vol. 53, no. 9, pp. 2207–2215, Sep. 2006.
[17] X. Hu, G. Simin, J. Yang, M. Asif Khan, R. Gaska and M.S. Shur, “Enhancement mode AIGaN/GaN HFET with selectively grown pn junction gate,” IEEE Electron Lett., vol. 36, no. 8, pp. 753–754, April. 2000.
[18] T. Fujii, S. Nakamura, K. Mizuno, R. Nega, M. Iwaya, S. Kamiyama, H. Amano, and I. Akasaki, “High drain current and low on resistance normally-off-mode AlGaN/GaN junction HFETs with a p-type GaN gate contact,” Physics Solid-State (c) 5, no. 6, pp. 1906–1909, 2008.
[19] W. B. Lanford, T. Tanaka, Y. Otoki, and I. Adesid, “Recessed-gate enhancement-mode GaN HEMT with high threshold voltage,” IEEE Electron. Lett., vol. 41, no. 7, pp. 449–450, Mar. 2005.
[20] T. Oka, and T. Nozawa, “AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications,” IEEE Electron Device Lett, vol. 29, no. 7, pp. 668–670, July. 2008.
[21] R. Gaska, A. Osinsky, J. W. Yang, and M. S. Shur, “Self-Heating in High-Power AlGaN-GaN HFET’s,” IEEE Electron Device Lett, vol. 19, no.3, pp. 89–91, Mar. 1998.
[22] W.S. Tan, P.A. Houston, G. Hill, R.J. Airey, and P.J. Parbook, “Influence of Dual-Frequency Plasma-Enhanced Chemical-Vapor Deposition Si3N4 Passivation on the Electrical Characteristics of AlGaN/GaN Heterostructure Field-Effect Transistors,” Journal of Electronic Materials, vol. 33, no.5 , pp. 400–407, 2004.
[23] T. Oishi, N. Miura, M. Suita, T. Nanjo, Y. Abe, T. O. H. Ishikawa, T. Egawa, and T. Jimbo, “Highly resistive GaN layers formed by ion implantation of Zn along the c axis,” Journal of Applied Physics, vol. 94, no.3 , pp. 1662–1666, Aug. 2003.
[24] S. Arulkumaran, T. Egawa, H. Ishikawa, and T. Jimbo, “Surface passivation effects on AlGaN/GaN High-electron-mobility transistors with SiO2, Si3N4 , and silicon oxynitride” Applied Physics Letters, vol. 84, pp. 613-615, 2004
[25] J. W. Chung, J. C. Roberts, E. L. Piner, and T. Palacios, “Effect of Gate Leakage in the Subthreshold Characteristics of AlGaN/GaN HEMTs,” IEEE Electron Device Lett, vol. 29, no.11 , pp. 1196–1198, Nov. 2008.
[26] J.Y. Shiu, J.C. Huang, V. Desmaris, C.T. Chang, C.Y. Lu, K. Kumakura, T. Makimoto, H. Zirath, N. Rorsman, and E.Y. Chang, “Oxygen Ion Implantation Isolation Planar Process for AlGaN/GaN HEMTs,” IEEE Electron Device Lett, vol. 28, no.6 , pp. 476–478, Jun. 2007.
[27] K. Nomoto, T. Tajima, T. Mishima, M. Satoh, and T. Nakamura, “Remarkable Reduction of On-Resistance by Ion Implantation in GaN/AlGaN/GaN HEMTs With Low Gate Leakage Current,” IEEE Electron Device Lett, vol. 28, no.11 , pp. 476–478, Nov. 2007.
[28] N. Maeda, K. Tsubaki, T. Saitoh, and N. Kobayashi, “High-temperature electron transport properties in AlGaN/GaN heterostructures”, Applied Physics Letters, vol. 79, no.11, pp. 1634-1636, Sep. 2001.
[29] T. Mizutani, Y. Ohno, M. Akita, S. Kishimoto, and K. Maezawa, “A Study on Current Collapse in AlGaN/GaN HEMTs Induced by Bias Stress,” IEEE Transactions on Electron Devices, vol. 50, no.10 , pp. 2015–2020, Oct. 2003.
[30] M. A. Khan, X. Hu, A. Tarakji, G. Simin, J. Yang, R. Gaska, and M. S. Shur, “AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors on SiC substrates,” Applied Physics Letters, vol. 77, no. 9, pp. 1339–1341, Aug. 2000.