臺灣博碩士論文加值系統

電壓控制振盪器(VCO)和鎖定除頻器(FD)在頻率合成器中是相當重要的區塊，對於現今可攜式的消費型產品和多頻段系統應用的普及，電路除了須滿足高效能，低複雜度等特性外，低功耗的設計需求在近年來也變得越來越受到重視

本篇論文提出了三個電壓控制振盪器與一個注入鎖定除頻器，壓控振盪器的部分總共有三顆，第一顆晶片實現於台積電0.18微米矽鍺製程,電路的操作頻帶在5.6GHz的低相位雜訊壓控振盪器，第二顆晶片則是用台積電0.18微米一般製程實現的三頻帶壓控振盪器操作的頻帶分別是9GHz、10GHz、4GHz，第三顆晶片則是用台積電90奈米製程、操作頻帶在4GHz、9GHz的四相位雙頻帶壓控振盪器。此外，在注入鎖定除頻器的部分，則有一顆是利用台積電0.18微米一般製程實現，具有80%鎖定範圍與78%可調範圍之主動電感架構的除三注入鎖定除頻器。

在第一部分我們利用矽鍺異質接片電晶體具有低閃爍雜訊的可以提升電路的相位雜訊特性，提出一個利用台積電0.18微米矽鍺製程實現的壓控振盪器，，在的電源給定為1.5V時，電路操作的頻段為5.6GHz，相位雜訊在1MHz的地方為-122.01 dBc/Hz。

在第二部份則是提出了一個利用考畢子和克萊普共振腔所合併所完成的雙共振腔電路，來實現三頻帶的壓控振盪器，此電路實現於台積電0.18微米一般製程，當電源給定1V時，電路的功率消耗為5.5mW，其操作的頻段分別是(1) 9.73 GHz to 11.06 GHz, (2) 9.07 GHz to 9.34 GHz, and (3) 3.64 GHz to 4.04 GHz。當電路操作在9.82 GHz，相位雜訊在1MHz的地方為-111.02，其FOM為-183.45 dBc/Hz。

第三部分則提出了一個利用90奈米製程實現的雙頻帶四相位壓控振盪器，
不同於以往利用主動元件來實現四相位機制，此電路利用一般電容耦合兩組差動輸出的壓控振盪器來實現四相位的機制，當電源給定1.1V時，電路的功率消耗為2.75mW，電路的操作頻率為(1) 8.77 GHz to 9.12 GHz (2) 3.68 GHz to 4.16 GHz
相位雜訊方面，在1MHz的地方分別為 (1)-120.39 dBc/Hz (2) -118.75 dBc/Hz，其FOM分別為(1)-194.86 dBc/Hz (2) -186.05 dBc/Hz

最後我們提出了一個利用雙推式架構的特性，來實現一雙推式之主動電感除三直接注入鎖定除頻器。當電源給定1.4V時，可調範圍為1.39 GHz to 3.18 GHz(78%)，其鎖定範圍則是從4.4 GHz to 10.3 GHz (80.27Hz) 。

The voltage controlled oscillator (VCO) and frequency divider (FD) plays a critical role at frequency synthesizer. For modern portable production (such as cell-phone) and multi-band system, the RF circuit satisfy except high-performance and low-complexity, designing requirements of these circuits become more stringent on the low-power, in recent years

This thesis presents two voltage-controlled oscillators (VCOs), one quadrature voltage-controlled oscillator (QVCO), and an avtive-inductor injection-locked frequency divider by 3 which is using push-push oscillator.

The first part we present a BiCMOS voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The VCO consists of an nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT diodes. SiGe HBT has an inherently low flicker noise compared to CMOS devices. At the supply voltage of 1.5 V, the output phase noise of the VCO is -122.01 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.43 dBc/Hz.

Secondly, we propose a differential triple-band voltage-controlled oscillator (VCO) which was designed and implemented in a 0.18 μm CMOS 1P6M process. The designed VCO circuit uses a differential Colpitts negative resistance cell and fourth-order passive LC resonator. At the supply voltage of 1 V, the core power consumption is 5.5 mW. The tuning range of the triple frequency bands are (1) 9.73 GHz to 11.06 GHz, (2) 9.07 GHz to 9.34 GHz, and (3) 3.64 GHz to 4.04 GHz. The output phase noise of the VCO is -111.02 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 9.82 GHz, and the figure of merit is -183.45 dBc/Hz.

In The third part, a dual-band quadrature voltage-controlled oscillator (QVCO) has been studied and implemented in the TSMC 90nm 1P9M CMOS technology. The proposed CMOS QVCO comprises two complementary cross-coupled dual-resonance VCOs and 4 capacitors in a ring for coupling the two differential VCOs. The die area of the dual-band QVCO is 0.831×0.97 mm2. At the supply voltage of 1.1 V, the total power consumption is 2.75 mW. The free-running frequency of the QVCO is tunable from 8.77/3.68 GHz to 9.12/4.16 GHz as the tuning voltage is varied from 0.0/0.6 V to 0.5/1.1 V. The measured phase noise at 1 MHz frequency offset is -120.39/-118.75 dBc/Hz at the oscillation frequency of 8.79/3.847 GHz and the figure of merit (FOM) of the proposed QVCO is -194.86/-186.05 dBc/Hz.

Finally, a new wide locking range active-inductor divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The push-push ILFD circuit is realized with a push-push cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 7.41 mW. The divider’s free-running frequency is tunable from 1.39 GHz to 3.18 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 2.9 GHz (43.6%), from the incident frequency 5.2 GHz to 8.1 GHz. The operation range is 5.9 GHz (80.27%), from 4.4 GHz to 10.3 GHz.

中文摘要 I
Abstract III
誌謝 V
Table of Contents VI
List of Figures VIII
List of Tables IX
Chapter 1 Introduction 1
1.1 Background 1
1.2 Research Motivation 2
1.3 Framework of the Thesis 3
Chapter 2 Principle of the VCO 5
2.1 The Oscillator Theory 6
2.1.1 Feedback model 6
2.1.2 Negative Resistance 8
2.2 Review of Oscillator Topologies 11
2.2.1 Ring Oscillator 11
2.2.2 LC Oscillator 15
Chapter 3 Design Concepts of Voltage-Controlled Oscillators 27
3.1 Characteristics of a Voltage-Controlled Oscillator 27
3.1.1 Center Frequency [Hz] 27
3.1.2 Power Consumption (W) [mW] 27
3.1.3 Phase Noise (PN) [dBc/Hz] 27
3.1.4 Tuning Range [Hz] 27
3.1.5 Output Signal Power [dBm] 28
3.1.6 Figure of Merit (FOM) [dBc/Hz] 29
3.2 Phase Noise & Quality Factor In Oscillator 29
3.2.1 Quality factor (Q) and Oscillator 29
3.2.2 Dependence of Phase Noise on Q and Offset Frequency. 32
3.2.3 Definition of Phase Noise 34
3.2.4 Phase Noise in Wireless Communications 36
3.2.5 Linear Tie Invariant (LTI) Model - (The Lesson’s model) 39
3.2.6 Linear Time Variant (LTV) Model - (The Hajimiri’s Model) 42
3.3 Quadrature VCO Design 47
3.4 Dual-Resonant Cavity VCO Design 51
3.4.1 Dual-Band Resonator 51
3.4.2 Two Series-LC Resonators 55
3.5 Active Inductor VCO Design 56
3.6 Push-Push VCO Design 60
Chapter 4 Design Concepts of Injection Locking Frequency Divider 63
4.1 Introduction 63
4.2 Principle of Injection Locked Frequency Divider 64
4.3 Locking Range 65
4.4 Direct ILFD 67
Chapter 5 A 0.18 μm SiGe BiCMOS HBT VCO Using Diode Degeneration 69
5.1 Introduction 69
5.2 Circuit Design 71
5.3 Measurement Results 74
Chapter 6 A Triple-Band Differential VCO Using Gate-Connected Dual-Resonance Resonator 77
6.1 Introduction 77
6.2 Design of Differential Triple-band VCO 78
6.3 Measurement Results 80
Chapter 7 CMOS Dual-Resonance Quadrature VCO Using the MIM Capacitor Coupling 84
7.1 Introduction 84
7.2 Circuit Design 85
7.3 Measurement Results 88
Chapter 8 Wide-locking Range ÷3 Active-Inductor Injection-Locked Frequency Divider Using the Push-Push Oscillator 93
8.1 Introduction 93
8.2 Circuit Design 94
8.3 Measurement Result 95
Chapter 9 Conclusion 101
Reference 103

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