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研究生:許健宗
研究生(外文):Hsu, Chien, Tsung
論文名稱:應用在視覺輔具中刺激器的10位元電流導向數位類比轉換器
論文名稱(外文):Design of A 10-bit Current Steering Digital-to-Analog Converter for Stimulators in Visual Aids
指導教授:陳俊勝
指導教授(外文):Chen, Chun, Shen
口試委員:蘇純賢劉竹峯陳俊勝
口試委員(外文): Chen, Chun, Shen
口試日期:2012-07-14
學位類別:碩士
校院名稱:中華科技大學
系所名稱:電子工程研究所碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:57
中文關鍵詞:電流導向溫度計碼二進位權重碼
外文關鍵詞:Current steeringThermometer codeBinary code
相關次數:
  • 被引用被引用:0
  • 點閱點閱:103
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  • 下載下載:5
  • 收藏至我的研究室書目清單書目收藏:0
本論文實現一個應用在視覺輔具中刺激器的十位元電流導向數位類比轉換
器。此十位元數位類比轉換器採取二段式的架構,將輸入訊號分成六位元最大有
效數碼與四位元最小有效數位碼兩區塊。六位元區塊使用溫度計碼(Thermometer
Code)解碼,而四位元區塊則使用二進位權重碼(Binary Weighted Code)解碼,以
逹到較佳的微分非線性誤差(Differential nonlinearity error, DNL)及確保電路的單
調性(Monotonic)。在電流源的設計上,我們採用疊接(Cascode)的架構去提升數位
類比轉換器性能,譬如積分非線性誤差(Integral nonlinearity error, INL)和無突波
動態範圍(Spurious Free Dynamic Range, SFDR)的特性。此外,本電路也設計一個
高速且具高切換點的切換開關去減低在訊號切換過程中所造成的瞬時脈衝的錯
誤。
本電路使用 TSMC 0.18 微米、1Poly/6Metal、混合信號/射頻、1.8V/3.3V 電
壓製程,佈局後模擬的結果顯示出DNL 小於0.05 LSB,而INL 小於0.05 LSB。
當取樣頻率為2MHz,與輸入信號為46.875KHz 時,無突波動態範圍(SFDR)為
79.7027dB,功率消耗為7.6 mW。整個佈局的面積0.357 mm2。本電路能提供穩
定的電流給視覺輔具中刺激器使用。
This thesis realizes a 10-bit current steering digital to analog converter applied in
the stimulators of visual aids. This converter, using two-segment architecture,
separates input signals into the six most significant bits and the four least significant
bits. The six-bit segment is decoded by thermometer code and the four-bit segment is
decoded binary weights to get better differential nonlinearity error (DNL) and to
ensure the monotonic. In the design of the current sources in the converter, we use
cascode architecture to enhance its performance, such as integral nonlinearity error
(INL) and spurious-free dynamic range (SFDR). In addition, a high speed, high
switching point switch is designed to reduce the error generated by the instantaneous
pulse signal when the signal is switching.
This converter circuit is realized by TSMC 0.18-micron, 1Poly/6Metal,
mixed-signal / RF, 1.8V/3.3V process. Post-layout simulation results show that the
DNL is less than 0.05 LSB, the INL is less than 0.05 LSB, and the spurious-free
dynamic range of 79.7027 dB, with the sampling frequency of 2MHz, the input signal
of 46.875 kHz. The power consumption of 7.6 mW and the entire layout area is 0.357
mm2. This converter circuit can provide a stable current for in the stimulators of visual
aids.
Abstract ---------------------------------------------------i
摘要------------------------------------------------------ ii
目次----------------------------------------------------- iii
圖目錄---------------------------------------------------- v
表目錄---------------------------------------------------viii
第一章 緒論----------------------------------------------- 1
第一節 研究動機---------------------------------------------- 1
第二節 電刺激參數-------------------------------------------- 3
第三節 規格-------------------------------------------------- 5
第四節 論文架構---------------------------------------------- 5
第二章 數位類比轉換器技術原理-------------------------------- 6
第一節 數位類比轉換器簡介------------------------------------- 6
第二節 理想數位類比轉換器------------------------------------- 7
第三節 數位類比轉換器參數規格---------------------------------- 9
第三章 電流導向數位類比轉換器之設計考量---------------------- 19
第一節 電路之優勢------------------------------------------- 19
第二節 電路之非理想效應-------------------------------------- 20
第四章 電流導向數位類比轉換器規格與說明--------------------- 30
第一節 設計規格--------------------------------------------- 30
第二節 電路說明--------------------------------------------- 31
第五章 電流導向數位類比轉換器之模擬-------------------------- 39
第一節 V/I轉換器電路模擬結果---------------------------------- 39
第二節 電流導向數位類比轉換器電路模擬結果----------------------- 40
第六章 佈局驗證與佈局模擬---------------------------------- 43
第一節 實際佈局--------------------------------------------- 43
第二節 驗證說明--------------------------------------------- 48
第三節 佈局模擬結果------------------------------------------ 49
第七章 結論---------------------------------------------- 54
參考文獻-------------------------------------------------- 55
作者簡介-------------------------------------------------- 57
[1] 唐經洲,王立洋,“VLSI 設計概論/實習”,3 版,高立圖書公司,2002。
[2] 蕭培墉,吳孟賢,“HSpice 積體電路設計分析與模擬導論”,初版,台灣
東華書局股份有限公司,2007。
[3] 謝永瑞,“VLSI 概論”,2 版,全華科技圖書公司,1998。
[4] A. Van den Bosch, M. Steyaert and W. Sansen, “An accurate statistical yield
model for CMOS current-steering D/A converters,” IEEE International
Symposium on Circuits and Systems, vol. 4, pp. 105-108, 2000.
[5] A. Van den Bosch, M. Steyaert and W. Sansen, “SFDR-bandwidth limitations for
high-speed high-resolution current-steering CMOS D/A converters,” The 6th
IEEE International Conference on Electronics Circuits and Systems, vol. 3, pp.
1193-1196, 1999.
[6] A. Van den Bosch, M. A. F. Borremans, M. S. J. Steyaert and W. Sansen, “A
10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter,” IEEE
Journal of Solid-State Circuits, vol. 36, no. 3, pp. 315-324, 2001.
[7] B. Razavi, Principles of Data Conversion System Design, New York: IEEE Press,
1995.
[8] B. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill, Inc., 2001.
[9] CIC 訓練課程“Full-Custom IC Design Kit”.
[10] D. Mercer, “A 16-b D/A converter with increased spurious free dynamic range,”
IEEE Journal of Solid-State Circuits, vol. 29, no. 10, pp. 1180-1185, 1994.
[11] H. Kohno, Y. Nakamura, A. Kondo, H. Amishiro and T. Miki, “A 350-MS/s
3.3-V 8-bit CMOS D/A converter using a delayed driving scheme,” IEEE
Custom Integrated Circuits Conference, pp. 211-214, 1995.
[12] http://webvision.med.utah.edu.
[13] http://www.blindness.org.
[14] J. Bastos, A. M. Marques, M. S. J. Steyaert and W. Sansen, “A 12-bit intrinsic
accuracy high-speed CMOS DAC,” IEEE Journal of Solid-State Circuits, vol. 33,
no. 12, pp. 1959-1968, 1998.
[15] J. S. Shyu, M. Maia, J. D. Weiland, T. O’Hearn, S. J. Chen, E. Margalit, S.
Suzuki and M. S. Humayun, “Electrical stimulation in isolated rabbit retina,”
IEEE Trans. Neural Systems and Rehabilitation Engineering, vol. 14, no. 3, pp.
290-298, 2006.
[16] J. Simpson and M. Ghovanloo, “An experimental study of voltage, current, and
charge controlled stimulation front-end circuitry,” IEEE International
Symposium on Circuits and Systems, pp. 325-328, 2007.
[17] K. Cha, K. W. Horch, R. A. Normann and D. K. Boman, “Reading speed with a
pixelized vision system,” Journal of the Optical Society of America A, vol. 9, no.
5, pp. 673-677, 1992.
[18] M. S. Humayun, J. D. Weiland, G. Y. Fujii, R. Greenberg, R. Williamson, J.
Little, B. Mech, V. Cimmarusti, G. V. Boemel, G. Dagnelie and E. de Juan Jr,
“Visual perception in a blind subject with a chronic microelectronic retinal
prosthesis,” Vision Research, vol. 43, no. 24, pp. 2573-2581, 2003.
[19] M. S. Humayun, E. de Juan Jr., G. Dagnelie, R. J. Greenberg, R. H. Propst and D.
H. Phillips, “Visual perception elicited by electrical stimulation of retina in blind
humans,” Archives Ophthalmology, vol. 114, no. 1, pp. 40-46,1996.
[20] M. S. Humayun, E. de Juan Jr, J. D. Weiland, G. Dagnelie, S. Katona, R.
Greenberg and S. Suzuki, “Pattern electrical stimulation of the human retina,”
Vision Research, vol. 39, no. 15, pp. 2569-2576, 1999.
[21] R. W. Thompson Jr, G. D. Barnett, M. S. Humayun and G. Dagnelie, “Facial
recognition using simulated prosthetic pixelized vision,” Investigative
Ophthalmology and Visual Science, vol. 44, no. 11, pp. 5035-5042, 2003.
[22] S. Suzuki, M. S. Humayun, J. D. Weiland, S. J. Chen, E. Margalit, D. V.
Piyathaisere and E. de Juan Jr., “Comparison of electrical stimulation thresholds
in normal and retinal degenerated mouse retina,” Japanese Journal of
Ophthalmology, vol. 48, no. 4, pp. 345-349, 2004.
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