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研究生:楊勝傑
研究生(外文):Sheng-Jie Yang
論文名稱:運用回歸型最簡類化型小腦模型控制器改善全球衛星定位系統動態誤差
論文名稱(外文):Improvement in GPS Dynamic Error by Using Recurrent S_CMAC_GBF
指導教授:江青瓚
指導教授(外文):Ching-Tsan Chiang
學位類別:碩士
校院名稱:清雲科技大學
系所名稱:電機工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:77
中文關鍵詞:回歸架構最簡定址架構之類化型小腦模型控制器全球衛星定位系統預測改善動態誤差
外文關鍵詞:RecurrentS_CMAC_GBFGPSPredictionImprovementDynamic Error
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本研究的目的是要運用”回歸型最簡定址架構之類化型小腦模型控制器”(Recurrent S_CMAC_GBF)來改善全球衛星定位系統(Global Positioning System)之精準度,並使其以FPGA晶片來實現及測試。本研究呈現以Recurrent S_CMAC_GBF 改善GPS之動態誤差,並回饋至接收器本身做誤差校正,藉由改善並提升衛星接收器定位的準確度。我們使用低成本的商業模組(Trimble Lassen IQ)與昂貴的商業模組(Trimble 5700)接收器改善GPS動態誤差,讓低成本的商業模組(Trimble Lassen IQ)接收器的定位精準度做進一步的提昇。最後使用以Recurrent S_CMAC_GBF為架構之FPGA硬體測試結果,並由RS-232將資料回傳至電腦驗證之。

The purpose of this research is to develop and apply the Recurrent S_CMAC_GBF (RSCMAC) to enhance the accuracy of GPS (Global Positioning System). The performance is implemented and tested by a FPGA chip. This research presents to Recurrent S_CMAC_GBF improve the dynamic error of the GPS, and feedback to the receiver to do error correction, by improving the satellite receiver positioning accuracy. We used a low cost commercial module (Trimble Lassen IQ) receiver and the expensive commercial module (Trimble 5700) receiver to improvement the GPS dynamic error, so that low-cost commercial modules (Trimble Lassen IQ) receiver positioning accuracy improve to further. Finally, the FPGA chip is used implement Recurrent S_CMAC_GBF hardware structure, the result will be back to computer by RS-232 to verify.

中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vii
圖目錄 viii
第一章 緒論 1
1.1 研究背景與動機 1
1.2 研究目的 3
1.3 研究方法 3
1.4 論文架構 4
第二章 全球衛星定位系統 5
2.1 GPS簡介 5
2.2 全球衛星定位系統之原理 6
2.2.1 GPS系統基本架構 8
2.2.2 基本觀測原理 10
2.2.3 載波電碼 12
2.2.4 最小平方法 13
2.2.5 全球衛星定位系統之計算 15
2.3 差分式衛星定位系統之原理 17
2.4 全球衛星定位系統誤差探討 18
2.4.1 自然環境誤差 18
2.4.2 人為因素誤差 20
2.4.3 GPS訊號格式 21
2.5 結語 24
第三章 回歸型最簡類化型小腦模型控制器之理論 25
3.1 回歸型最簡類化型小腦模型控制器(Recurrent S_CMAC_GBF) 25
3.1.1 架構設計 25
3.1.2 學習方法 27
3.2 Recurrent S_CMAC_GBF之學習能力 29
3.2.1 簡單之時序關聯性例子 29
3.2.2 動態(dynamic)非線性系統 30
3.3 結語 32
第四章 以回歸型最簡類化型小腦模型控制器為基礎架構改善GPS動態誤差 33
4.1 硬體測試設備介紹與資料搜集 33
4.1.1 Trimble全球定位接收器介紹 34
4.1.2 設備架設與資料搜集 34
4.2衛星定位系統之動態誤差預測 37
4.2.1 以Recurrent S_CMAC_GBF為基礎之GPS動態誤差訓練架構與步驟 39
4.2.2 以Recurrent S_CMAC_GBF為基礎之GPS動態誤差測試架構與步驟 43
4.2.3動態誤差測試模擬結果 45
4.3 衛星定位系統之誤差改善 46
4.3.1 誤差改善架構 47
4.4 結語 51
第五章 以Recurrent S_CMAC_GBF改善GPS動態誤差之硬體測試 52
5.1 硬體測試設備介紹 52
5.1.1 Stratix II系列之FPGA實驗板 52
5.1.2 硬體測試設備連接 53
5.2 硬體架構設計 54
5.2.1參數記憶體模組(Parameters_ROMs) 55
5.2.2回歸模組(Recurrent Module) 56
5.2.3高斯函數產生器模組(GBF Generators) 57
5.2.4輸出模型乘加器模組(MAC) 58
5.3 硬體模組之功能及原理 59
5.4 軟體模擬與硬體測試結果 65
5.5 結語 68
第六章 結論 69
6.1 研究成果 69
6.2 研究問題與解決方法 69
6.3 研究心得 70
6.4 未來展望 70
參考文獻 71
附錄 73
簡歷 77




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