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研究生:陳鴻文
研究生(外文):Chen, Hong-Wen
論文名稱:腦部深層刺激器介面電路
論文名稱(外文):An Interface Circuit for Deep Brain Stimulator
指導教授:沈鼎嵐
指導教授(外文):Shen, Ding-Lan
口試委員:陳超群盛鐸
口試委員(外文):Chen, Chao-ChyunSheng, Duo
口試日期:2012-06-21
學位類別:碩士
校院名稱:輔仁大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:68
中文關鍵詞:腦部深層刺激器數位類比轉換器轉導放大器數位脈波產生器
外文關鍵詞:Deep Brain StimulatorDACTransconductance AmplifierDigital Pulse Generator
相關次數:
  • 被引用被引用:0
  • 點閱點閱:108
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  • 下載下載:6
  • 收藏至我的研究室書目清單書目收藏:1
本論文發展出一個應用於腦部深層刺激術(Deep Brain Stimulation, DBS)的介面電路,提供了四個頻道的刺激電流輸出。使用者可從外部設定產生刺激電流的頻率、波寬以及個別的振幅,透過此介面電路得到對應的刺激方式。使用簡單的數位電路設計而成的數位脈波產生器產生控制頻率以及正、負波寬的訊號,Capacitor DAC搭配雙向定電流產生器依據輸入的振幅參數產生對應的電流輸出。使用CMOS 0.35μm製程實現,供應電壓為3.3V。在典型的10k電極負載之下,可產生具有8位元解析度分布於0~165μA之間的輸出刺激電流。刺激頻率介於126~244Hz之間,刺激波寬則介於0~120μs之間,並各自擁有4位元的解析度。
This thesis develops an interface circuit which is applied in the deep brain stimulation surgery. This circuit provides four-channel outputs with the stimulating current. The user is able to adjust the frequency, time interval, and individual amplitudes of the stimulating current through the proposed interface circuit. These programmable parameters are generated by digital pulse generator which is fabricated with simple digital circuits. The capacitor DAC and the biphasic current generator produce constant output current according to the amplitude value set by user. This circuit is realized by a typical CMOS 0.35μm technology with 3.3V supply voltage. By loading with typical 10k electrode impedance, the output stimulating current has 8-bit resolution of amplitude between 0μA and 165μA, 4-bit resolution of frequency between 126Hz and 244Hz, and 4-bit resolution of time interval between 0μs and 120μs.
摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vi
圖目錄 vii
第一章 緒論 1
1.1 研究動機 1
1.2 研究目的 1
1.3 論文內容介紹 2
第二章 文獻探討 3
2.1 人體電刺激器簡介 3
2.2 腦部深層刺激術簡介 3
第三章 腦部深層刺激器介面電路之設計與模擬 5
3.1 系統架構 5
3.2 系統時脈產生器與重置訊號產生電路 5
3.2.1 系統時脈產生器 5
3.2.2 重置訊號產生電路 8
3.3 輸入訊號介面電路與參數暫存器 10
3.3.1 暫存器 10
3.3.2 輸入訊號介面電路 12
3.4 數位脈波產生器 17
3.5 雙向定電流產生器 21
3.5.1 線性化轉導放大器 21
3.5.2 橋式切換電路 24
3.5.3 摺疊疊接式放大器 26
3.6 數位類比轉換器 29
3.6.1 Flip-Around DAC 29
3.6.2 Capacitor DAC 30
3.6.3 Capacitor DAC中的運算放大器 31
3.6.4 Capacitor DAC模擬結果 36
3.7 數位多工器與類比解多工器 38
3.7.1 分時多工技巧 38
3.7.2 環形計數器 40
3.7.3 取樣保持電路 41
3.8 測試電路與整體系統模擬 45
3.8.1 測試電路 45
3.8.2 整體系統模擬 46
第四章 電路佈局以及量測結果 47
4.1 電路佈局 47
4.1.1 整體電路佈局 47
4.1.2 Capacitor Array佈局 49
4.2 量測平台簡介 52
4.3 量測結果 54
第五章 結論與未來展望 58
5.1 結論 58
5.2 未來展望 58
參考文獻 59
附錄A 61
附錄B (已發表論文) 68

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