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研究生:朱文彬
研究生(外文):Wen-Pin Chu
論文名稱:模糊類神經網路與動態參數學習法則之數位電路設計
論文名稱(外文):Digital Circuit Design for a Fuzzy Neural Network and Dynamic Parameter Learning Rule
指導教授:簡江儒
指導教授(外文):Chiang-Ju Chien
口試委員:練光祐王盈中
口試日期:2012-06-21
學位類別:碩士
校院名稱:華梵大學
系所名稱:電子工程學系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:64
中文關鍵詞:模糊類神經網路動態參數學習法則場可程式化邏輯閘陣列硬體描述語言
外文關鍵詞:Fuzzy Neural NetworkDynamic Parameter Learning RuleField Programmable Gate Array (FPGA)Very High Speed Integrated Circuit Hardware Description Language (VHDL)
相關次數:
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  • 下載下載:71
  • 收藏至我的研究室書目清單書目收藏:0
模糊類神經網路的參數學習法則是一個長久以來智慧型控制學術界非常重要的研究題目。本論文針對以三角形模糊集合為歸屬函數的模糊類神經網路為對象,探討其倒傳遞動態參數學習法則之推導。我們求出模糊類神經網路三角形模糊集合中點、底部寬度以及輸出權重等參數的學習法則,並利用一個三階非線性系統的輸出入資料作為訓練資料作電腦模擬,以Matlab程式驗證其學習性能,以證明倒傳遞動態參數學習法則的正確性與可行性。
而本論文最重要的貢獻則是將整個模糊類神經網路及其倒傳遞動態參數學習法則實作為一個數位電路,希望提供一個模糊類神經網路及學習法則在電路應用上的參考。由於數位化的考量,本論文選擇三角形模糊集合,因此其模糊類神經網路以及倒傳遞動態參數學習法則均可以用基本的加減乘除四則運算電路來實現。整個數位電路架構分為四大部分,包括模糊類神經網路電路、倒傳遞參數動態學習法則電路、訓練資料記憶體電路以及控制單元電路。本論文除了詳細探討電路的設計架構與原理外,並對每個重要的子電路以及整個完整電路作電腦模擬。本論文利用硬體描述語言(VHDL)來設計這個模糊類神經網路與動態參數學習法則電路,透過Altera Quartus II予以合成,並下載至Altera Cyclone II開發板上的場可程式化邏輯閘陣列(FPGA)晶片。電路的FPGA實驗結果證實與電路的Quartus II電腦模擬結果是一致,而與Matlab的電腦模擬也是符合的,這也證明了電路的設計與實作電路是正確且可行的。

The parameter learning algorithm for a fuzzy neural network is a long term study issue in the area of intelligent control. In this thesis, we investigate the backpropagation dynamic parameter learning algorithm for the fuzzy neural network with triangular fuzzy sets. We derive the parameter learning rules for the mid-point and width of the triangular fuzzy set as well as the output weighting parameters. A set of input output data of a third order nonlinear system is utilized as the training data for computer simulation. A MAtlab program is written to demonstrate the learning performance and prove the correctness and effectiveness of the learning algorithm.
The main contribution of this thesis is to implement the fuzzy neural network and backpropagation dynamic parameter learning algorithm as a digital circuit. The circuit can be realized by using the basic adder, subtractor, multiplier and divider circuits since the triangular fuzzy set is adopted. The whole digital circuit can be divided into four parts including the fuzzy neural network circuit, backpropagation dynamic parameter learning circuit, training dtat ROM circuit and control unit circuit. In addition to the discussion of the circuit design structure and theory, computer simulation is also made for each important subcircuit and the whole circuit. We use the VHDL to implement the circuit. The circuit is then synthesized by using Altera Quartus II and downloaded into an Altera Cyclone II development kit. The FPGA experimental results and the Quartus II computer simulation results are consistent. This confirms that the circuit design is feasible and correct.

致謝 I
摘要 II
Abstract III
目錄 IV
圖錄 VI
表錄 X
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 硬體架構 3
1.4 論文架構 4
第二章 模糊類神經網路與動態學習法則之設計與模擬 5
2.1 模糊類神經網路 5
2.2 倒傳遞動態參數學習法則 8
2.3 範例模擬 11
第三章 模糊類神經網路與動態參數學習法則之數位電路設計與模擬 15
3.1 模糊類神經網路之數位電路設計 15
3.2 模糊類神經網路之數位電路模擬 21
3.3 倒傳遞動態學習法則之數位電路設計 27
3.4 倒傳遞動態學習法則之數位電路模擬 42
3.5 控制單元之數位電路設計 45
3.6 控制單元之數位電路模擬 48
3.7 Rom_Table之數位電路設計 50
3.8 Rom_Table之數位電路模擬 52
第四章 實驗硬體架構與實驗結果 55
4.1 實驗硬體架構 55
4.2 實驗硬體介紹 56
4.2.1 Altera Cyclone II開發板 56
4.2.2 誤差結果顯示電路 57
4.3 電路合成與分析 57
4.4 實驗結果 59
第五章 結論與建議 61
參考文獻 62

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