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研究生:顏秀安
研究生(外文):Hsiu-AnYen
論文名稱:銅錳合金應用於銅導線製程之探討
論文名稱(外文):Investigation of CuMn alloy in copper metallization process
指導教授:李文熙
指導教授(外文):Wen-Hsi Lee
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:97
中文關鍵詞:擴散阻障層銅種晶層銅錳合金低介電質基板
外文關鍵詞:diffusion barrierCu seed layerCuMn alloylow-k substrates
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本研究主要探討銅錳合金薄膜作為積體電路內連線系統中擴散阻障層/銅晶種層之應用與分析,採用銅錳合金的原因是因為它是一種自形成阻障層(self-formed barrier)的材料,在製程步驟上可省略生成阻障層的步驟。本研究主要分為三個部分,第一個部分探討錳濃度對阻障能力的影響,錳濃度不同對阻障層的生成及穩定性有相當大的影響,其中採用純銅及銅錳合金薄膜(錳1 at.%、錳5 at.%、錳10 at.%)來進行阻障能力及熱穩定性的測試。利用TEM、SIMS進行了微觀結構的分析,結果顯示,經過退火後,適量錳濃度的銅錳合金薄膜與基板形成MnSixOy層能確實阻擋銅原子擴散進入基板中。
第二部分則是銅錳合金薄膜及低介電質基板的整合,採用低介電質基板主要希望降低RC延遲時間以增進元件效能。觀察重點為何種基板對阻障層的形成能有較佳的穩定性及阻障能力。各組樣品進行退火後,使用化學分析電子光譜儀(ESCA)進行錳鍵結的分析,而後以穿透式電子顯微鏡及二次離子質譜儀觀察界面性質變化及各元素訊號的縱深分佈來進一步分析阻障層的形成情況。統整分析結果顯示使用FSG 基板與錳5 at.% 的銅錳合金進行整合對阻障層的形成有最佳的穩定性。
第三部分以各銅錳合金薄膜進行電鍍銅測試,觀察銅錳合金薄膜作為銅晶種層之效用。實驗中利用SEM觀察銅核行為與電鍍銅的表面形貌。並使用電化學阻抗譜(EIS)對電化學行為進行調查,也被用來驗證在電鍍過程中的現象。結果發現,在錳濃度低於5 at.%時,當錳含量上升會導致電荷轉移阻抗(charge-transfer impedance)下降,使得電鍍銅較易進行;但錳含量高於5 at.%時,情況則是相反的。對照表面形貌以及相關電化學分析,得到的結果是一致的,適量的錳添加可使合金薄膜作為銅種晶層。

In this study, the characteristics of CuMn alloy films and their applications as the diffusion barrier/Cu seed layer for interconnect in IC are explored. Using CuMn as the barrier layer could reduce the thickness, because it could act as the barrier layer and seed layer at the same time. It is mainly divided into three parts. Part I is investigation of barrier ability when changing manganese concentration. First, we deposited pure copper and CuMn alloy film (Mn 1 at.%, Mn 5 at.%, Mn 10 at.%) on SiO2 substrate to produce alloy films (150nm) / SiO2 structure. Then the microstructures of the CuMn films were analyzed after annealing by TEM and SIMS.
Part II is the integration of CuMn films and low-k substrates, using five different substrates for comparison. And the behavior between the barriers and the substrates were investigated. First, we deposited CuMn film on the different substrates to produce alloy films (150nm) / substrate structure. Then in-situ resistance of the samples was measured to preliminarily judge diffusion situation. After annealing, the binding energy of Mn at the interface was analyzed by ESCA. Finally the microstructures and the depth profiles of the CuMn films after annealing were examined by TEM and SIMS. The results showed that the best barrier was formed in the integration between CuMn 5 at.% and FSG substrate.
Part III is that Cu was electrodeposited on CuMn alloy film to investigate the properties of these CuMn films. After Cu was deposited on CuMn, the surface morphology were observed by SEM, and we used electrochemical impedance analysis to investigate the effect of Mn concentration on the plated copper. The results showed that CuMn 5 at.% alloy thin film could form good barrier after annealing and had the best property as the seed layer during electrodeposition. We concluded that the addition of Mn had benefit to electrodeposition.

Contents
Chapter 1 Introduction 1
1.1 BEOL overview 1
1.2 RC delay effect 2
1.3 Cu / Low-k dielectric integration 4
1.4 Motivation 4
Chapter 2 Theory 6
2.1 The development of integrated circuits 6
2.2 Cu Metallization 7
2.2.1 Introduction 7
2.2.2 Copper Damascene process 8
2.3 Diffusion barrier 10
2.3.1 The types of diffusion barrier 10
2.3.2 Diffusion behavior 12
2.3.3 The evolution and requirement of diffusion barrier 14
2.4 Electroplating and copper seed layer 16
2.5 Literature review of self-forming diffusion barrier 17
2.6 Electroplating principle 19
2.6.1 Electrochemical deposition process[9] 19
2.6.2 Faraday's law and current efficiency 21
2.6.3 The composition of the electroplating system 22
2.6.4 The growth mechanism of thin film in Electroplating[13][14] 26
2.6.5 The factors of the electroplating process 28
2.6.6 Cyclic voltammetry 30
Chapter 3 Experiment Scheme 32
3.1 Experimental materials 32
3.1.1 Targets 32
3.1.2 Substrates 32
3.1.3 Gas 32
3.1.4 Chemicals 33
3.2 Process Equipments 33
3.2.1 Sputter System 33
3.2.2 Annealing System 36
3.2.3 Electroplating bath 38
3.2.4 Potentiostat 38
3.3 Analysis Equipments 41
3.3.1 Four point probe 41
3.3.2 Scanning Electron Microscope (SEM)[17] 43
3.3.3 X-ray photoelectron spectroscopy (XPS)[18] 45
3.3.4 Transmission Electron Microscopy (TEM) 46
3.3.5 Secondary ion mass spectrometry (SIMS) 46
3.4 Experimental methods and procedures 47
3.4.1 Wafer cleaning steps and sample preparation 47
3.4.2 Sputter process of the barrier layer 47
3.4.3 Annealing process 48
3.4.4 Solution configuration 48
3.4.5 Physical analysis of the material properties 48
3.4.6 Electrochemical analyses 49
3.4.7 Electrical measurements (Sheet resistance measurements) 49
3.4.8 Experimental procedures 50
Chapter 4 Results and Discussions 51
4.1 The diffusion barrier 51
4.1.1 Sheet resistance and deposition rate of the CuMn films 51
4.1.2 The observation of self-forming diffusion behavior by TEM 52
4.1.3 SIMS depth profiles analysis 56
4.2 Low-k material effects on self-formed diffusion barrier 61
4.2.1 In-situ sheet resistance measurement 61
4.2.2 XPS chemical state analysis of interfacial layer[31] 66
4.2.3 Cross-sectional TEM images 73
4.2.4 SIMS depth profiles analysis 80
4.3 Cu seed layer 84
4.3.1 The electrochemical characteristics of CuMn seed layer. 84
4.3.2 SEM observation of electroplating 86
4.3.3 Nyquist plots analysis and electroplating rate 89
Chapter 5 Conclusion 93
References 95
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