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研究生:藍信翔
研究生(外文):Shin-ShiangLan
論文名稱:感應馬達驅動器硬體迴路測試系統之設計與實作
論文名稱(外文):The Design and Implementation of Hardware-in-the-Loop Tester System for Induction Motor Driver
指導教授:陳敬陳敬引用關係
指導教授(外文):Jing Chen
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系專班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:96
中文關鍵詞:Hardware in the loopReal-time simulation馬達驅動器虛擬馬達
外文關鍵詞:Hardware in the loopHILReal-time simulationAC motorVirtual motor
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馬達的驅動應用系統必須具有穩定、高效率、安全可靠等特性。在馬達驅動系統開發過程中,研發人員必須擁有各種測試設備與不同機械負載來進行完善的設計。昂貴的硬體設備與測試過程之工安風險皆可能產生相當大的成本與意外支出,因此如何測試成為開發馬達驅動器的一大挑戰。本論文設計規劃並實作一感應馬達驅動器測試系統,此系統透過高速數位I/O擷取感應馬達驅動器所控制的三相調變輸出,透過低延遲的演算能力即時回授馬達應有的實際電流與轉速,實現硬體迴路測試系統(Hardware In the loop,HIL)的概念。
HIL系統的虛擬馬達可以快速且連續地即時反應,以模擬實際的交流電機瞬態或穩態響應。本論文設計之系統採用開放的硬體和軟體技術,提供從模擬到實際控制電機驅動器測試解決方案。該系統主要組成部份為:即時處理器、高速輸入輸出模組,與人機操作介面等。其開發介面主要以美商國家儀器提供之軟體−LabVIEW (Laboratory Virtual Instrument Engineering Workbench)與硬體−CompactRIO實作於cRIO之FPGA晶片上建構馬達模型,使HIL系統運算效能與精度得到最佳化;高速輸入輸出模組可擷取感應馬達驅動器之PWM調變信號,並將虛擬馬達的信號回饋給控制器;另經由設定RTOS 通訊介面與人機進行資料傳遞。
本論文設計與實作之感應馬達驅動器硬體迴路測試系統具備以下特性:運算時間小於1uS、提供多驅動器並聯測試、準確編碼器脈波輸出、可進行閉迴路測試。由測試結果之數據顯示本論文所提出的方法可以達到虛擬馬達的概念,與實際馬達反應數據與趨勢接近,可有效降低龐大的測試風險與成本,並可驗證驅動器調變的差異與效果,更加速了感應馬達驅動器開發速度。
In developing motor driver system, any application and process must be examined in details to meet the requirements of efficiency, stability and reliability. For this purpose, tests have to be conducted with various devices and different mechanical loads. In order to reduce the time, cost and risk associated with control system development, the virtual motor in hardware-in-the-loop (HIL) can be applied.
This thesis describes an AC motor driver test system implemented with virtual motor in HIL test platform. The HIL application utilizes open hardware and software technologies to provide motor driver test solutions ranging from simulation to real control. The three main parts of this system are: the real-time processor, the high-speed input and output (I/O) modules, and the human-machine interface. The real-time processor is developed with LabVIEW using CompactRIO platform to construct a model of motor in FPGA chip. The computing performance and accuracy are optimized in the HIL system. The high-speed I/O modules are capable of capturing the PWM modulation signal of AC motor, and output the signal of virtual motor from the HIL to the motor driver.
The implementation of this AC motor drive HIL test system presents the characteristics that the computation time is less than 1uS on the parallel test platform for multi-drive devices, and it can work with closed-loop test with high-precision encoder pulse output. From the results of experiments, it proves that the virtual motor in this HIL system produces the same responses as the actual motor. This HIL system thus can reduce significantly the complexity of motor driver tests and increases the flexibility of running different tests.
摘要 I
Abstract II
誌謝 III
目錄 IV
圖目錄 VII
表目錄 XI
第一章 緒論 1
1.1背景說明 1
1.2研究動機 2
1.3研究方法 3
1.4論文架構 4
第二章 系統原理 5
2.1交流感應馬達模型 5
2.1.1感應馬達空間向量式 5
2.1.2座標軸轉換 8
2.2 Related works 11
第三章 系統架構 15
3.1 軟體架構 15
3.1.1軟體需求 15
3.1.2 LabVIEW軟體 16
3.2 硬體架構 16
3.2.1硬體需求 16
3.2.2 CompactRIO硬體 17
3.2.3 CompactRIO Real Time controller 18
3.2.4 CompactRIO FPGA 19
3.2.5 CompactRIO C Serial Module 20
第四章 系統實作 22
4.1實作軟硬體佈署 22
4.1.1實作軟體佈署 22
4.1.2實作硬體規劃 23
4.2實作環境建立 25
4.3馬達原型開發 30
4.3.1 FPGA模組設定 30
4.3.2 FPGA運算原型 32
4.3.3固定點運算數 41
4.3.4運算與編譯優化 45
4.3.5 並聯系統開發 52
4.4即時控制器軟體 55
4.4.1軟體功能 55
4.4.2連結FPGA系統 56
4.4.3即時系統TCP/IP 60
4.4.4切換FPGA功能 62
4.5電腦TCP/IP監控軟體 63
4.5.1軟體功能 63
4.5.2人機介面功能 64
4.5.3測試平台功能 70
第五章 實驗結果 72
5.1 實驗環境建立 72
5.2測試數據 74
5.2.1模擬時間驗證 74
5.2.2基本頻率命令運轉測試 74
5.2.3馬達正反轉測試 75
5.2.4馬達電流趨勢測試(一) 76
5.2.5馬達電流趨勢測試(二) 77
5.2.6馬達T-N曲線測試(一) 79
5.2.7馬達T-N曲線測試(二) 80
5.2.8馬達T-N曲線測試(三) 81
5.2.9驅動器滑差補償響應測試 83
5.2.10電流暫態測試 84
5.2.11並聯系統測試 84
5.3測試結果分析 88
第六章 結論與展望 91
6.1結論 91
6.2未來展望 92
參考文獻 93
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