臺灣博碩士論文加值系統

本論文主要目的在設計與實現一個低雜訊、低功耗十六通道電生理訊號類比前端放大電路研究，可應用於各類微弱的生理訊號處理以及醫療儀器系統方面之應用。在生物醫學系統研究中，類比前端電路用於生物訊號之處理與調整，為不可或缺的重要元件。本論文設計的電路透過國家晶片系統設計中心使用TSMC 0.18um 1P6M CMOS標準製程來製作晶片。經由設計、模擬到佈局，我們實現了將微弱的生理訊號不受雜訊干擾，並在低失真的情況下將訊號放大以及單一通道功耗30uW的低雜訊低功率類比前端放大電路做為量測生理訊號之應用。此外，十六通道電路之實現也可讓我們使用單一die來做多通道同步量測多區域data，達到微系統之理念。並且量測多通道之間crosstalk以及variation特性分析來驗證輸出通道間訊號的互相干擾和製程差異對十六通道之影響。最終實際的量測結果證實此架構之生理訊號放大器，可完全符合生理訊號量測之需要。

This thesis, aims to design and implement of a low noise, low power-consumption 16-channel electrophysiological signal analog front-end amplifier(AFE), it’s can be applied to various types of weak physiological signal acquisition and medical instrumentation systems applications. In modern biomedical systems, AFE circuitry plays an important role in physiological signal conditioning and processing. This thesis describes the design of the circuit through the National Chip Implementation Center TSMC 0.18um 1P6M CMOS standard process to produce the chips. Through the design, simulation, layout, we realized the weak physiological signal from noise, and low distortion, signal amplification and single-channel power consumption 30uW low-noise low-power analog front-end amplifier circuit as the amount of measure the application of physiological signals. In addition, the realization of a 16 channel circuit allows synchronized measurements to do multi-channel multi-region the data using a single die to reach the concept of micro-systems. And crosstalk between the measured multi-channel and variation characteristics of the signal output channels interfere with each other to validate and process differences of the impact of the 16 channels. Ultimately, the actual measured results confirm this structure of the biosignal amplifier, can fully meet the needs of the physiological signal measurements.

中文摘要 I
ABSTRACT II
誌謝 III
目錄 IV
圖目錄 VI
表目錄 VIII
第一章 緒論 1
1-1 研究動機與目的 1
1-2 類比前端放大電路介紹 3
1-2-1 傳統差動放大器 3
1-2-2 儀表放大器 4
1-2-3 運算轉導放大器 5
1-2-4 微分差動放大器 6
1-3 論文架構 8
第二章 研究背景 9
2-1 電生理訊號介紹 9
2-2 心電圖(ECG)介紹 9
2-3 腦電圖(EEG)介紹 11
第三章 類比子電路設計 13
3-1 設計考量與目標 13
3-2 設計架構 14
3-2-1 設計流程 14
3-2-2 Single Channel Design 15
3-2-3 Differential Difference Amplifier (DDA) 15
3-2-4 Gain Stage Amplifier Circuit 18
3-2-5 Bias Circuit 18
3-2-6 VREF Circuit 19
3-2-7 16-Channel Block Diagram 20
3-3 晶片模擬結果 21
3-4 晶片佈局考量 27
3-4-1 差動對(Differential Pair)之佈局 27
3-4-2 佈局規劃 29
3-4-3 佈局平面圖 31
第四章 晶片量測結果 32
4-1 量測考量 32
4-2 類比前端放大電路量測 34
4-2-1暫態響應量測結果 35
4-2-2 頻率響應量測結果 38
4-2-3 THD、Input-referred noise 量測結果 40
4-2-4 多通道之 crosstalk 與 Variation 特性之分析 42
4-3與市售儀表放大器比較 46
第五章 結論與未來展望 49
5-1 結論 49
5-2 未來展望 50
參考文獻 51

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