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研究生:林黃凱
研究生(外文):Huang-Kai Lin
論文名稱:減少非晶相銦鎵鋅氧化物薄膜電晶體之介面以及本體缺陷並改善載子遷移率
論文名稱(外文):Suppression of Interface and Bulk Defects in a-IGZO Thin Film Transistors with Improved Carrier Mobility
指導教授:黃建璋黃建璋引用關係
口試委員:胡振國李建模葉秉慧
口試日期:2012-07-19
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:光電工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:74
中文關鍵詞:非晶相銦鎵鋅氧化物薄膜電晶體混成結構次臨界擺幅
外文關鍵詞:a-IGZOTFThybrid structuresubthreshold swing
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金屬氧化物,由於其具有的高載子遷移率,被認為是種可作為薄膜電晶體(TFT)通道層的材料。以其作為通道層材料的TFT,或許可以提供更大的電流去驅動尺寸更大的面板以及有機發光二極體(OLED)。
為了上述的目標,很多團隊遂致力於改善TFT元件的特性。而在這些研究中,次臨界擺幅(SS)是一個能去比較元件好壞的重要參數。根據TFT的傳輸機制,載子主要於通道層以及絕緣層介面的部分區域流動。在通道層和絕緣層的介面以及在通道層中的缺陷會困住載子,造成較大的SS和較低的載子遷移率。因此,在介面附近的品質會深深影響TFT的特性。
我們在絕緣層以及通道層都分別採用了新的製程方式,混成結構。在絕緣層上的應用,使用HfO2/SiO2 的組合。由於使用高電介質材料,閘極偏壓可以造就更強的電場,因而對於載子有更好的控制能力。於通道層方面,則是以兩層在不同退火條件下的薄膜組合而成。這兩層薄膜具有不同的導電率和載子濃度。藉由合成結構的作法,可以保留兩層薄膜分別具有的優點,使得SS有了0.17V/decade的降低,載子遷移率則可增加50%以上。
在改善TFT的特性之後,我們將TFT組合成電路以驗證元件的動態表現。而元件和電路所表現出的結果是非常一致的。然而,我們也發現臨閾電壓在電路操作時扮演了重要的角色。若非控制得宜,則可能會造成邏輯電路無法呈現出正確的邏輯函數。此外,TFT經過進一步的製程步驟可以被製作成為感測器,被應用在生醫感測方面,可以偵測到蛋白質抗體等細微的電量變化。


Metal oxides, due to its high mobility (>10cm2/V‧s), become a promising channel material in thin-film-transistors (TFTs), which is expected to provide large current to drive larger sized displays and organic light emitting diodes (OLEDs).
To achieve the goal, many efforts have been made by several groups to improve the TFTs’ properties. Among the researches, subthreshold swing (SS) is the main parameter to benchmark the TFT’s performance. According to the transport mechanism of the TFTs, mobile carriers flow through the channel just beneath the dielectric. The interface and bulk defects there would somehow trap carrier causing larger SS and lower drift mobility. Therefore, the quality of channel close to the channel/dielectric interface is the most important factor to affect the characteristics of TFTs.
In the thesis, a new approach, hybrid structure, is applied in gate dielectric layer and channel layer separately. For dielectric layer application, HfO2/SiO2 composition is adopted. With high-κ material, HfO2, gate voltage can induce stronger electrical field to increase its ability to control the carrier. For the channel layer application, channel is composed of a-IGZO layers grown in two steps with varied annealing condition. These two layers show different conductivity and carrier concentration. By using the method to combine them together, the advantages of each channel can be kept, which can achieve more than 170mV/decade decrease of SS and more than 50% increased mobility.
After improving TFT’s characteristics, some circuit applications are conducted to verify the dynamic performance of the TFT device. The outcome of the circuits and devices are quite consistent with each other. However, it is found that threshold voltage plays a rather important role when operating complicated circuit, which would affect whether the logic gate circuit can function in a correct manner. Furthermore, TFTs are applied to be a novel bio-sensor, which can sense small net charge variation.


謝誌………………………………………………………………………...I
Abstract…………………………………………………………………...III
摘要………………………………………………………………………..V
Chapter 1 Introduction
1.1 Overview / Background of TFT development………………………………1
1.1.1 Current status and limitation of a-Si:H TFT backplane technology………1
1.1.2 TFT in Organic Light-Emitting Diode (OLEDs) displays application……4
1.1.3 High performance metal oxide TFTs………………………………………..7
1.2 Literature reviews about TFT’s treatment methods……………………….10
References………………………………………...…………………………………12
Chapter 2 Characteristics of TFTs with Hybrid Structure
2.1 Introduction…………………………………………………………………….14
2.2 Device Fabrication………………………………………………………..…….16
2.2.1 Fabrication of TFTs with hybrid dielectric………………………………….16
2.2.2 Fabrication of TFTs with hybrid channel…………………………………...18
2.3 The Characteristics of TFTs with hybrid dielectric…………………………20
2.4 The Characteristics of TFTs with hybrid channel…………………………..24
2.4.1 Effects of IGZO1 on the device performance……………….….…………..24
2.4.2 Carrier concentration measured by Hall measurement………..……………33
2.5 The channel length dependent Characteristics of a-IGZO TFTs..………….37
References………………………………………………………………….…………..39
Chapter 3 Application Based on a-IGZO TFTs
3.1 Introduction to the oxide based TFT circuits………….………………….41
3.2 Fabrication process
3.2.1 Fabrication process of circuits...................................................................43
3.2.2 Fabrication process of TFT bio-sensor………………………….……….46
3.3 Results of Circuit application
3.3.1 Inverter application of improved hybrid channel TFTs………………….48
3.3.2 Carrier concentration measured by Hall measurement…………………..51
3.3.3 Logic gate application…………………………………………………...60
3.4 Channel length dependent D-mode inverter …………………….………..64
3.5 Bio-sensor application………………………………………………………68
References………………………………………………………………………….72
Chapter 4 Conclusion……………………………………………………..........73


Chapter1

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[18] M. Furuta, T. Nakanishi, M. Kimura, T. Hiramatsu, T. Matsuda, H. Furuta, T. Kawaharamura, C. Li, and T. Hirao, "Effect of Surface Treatment of Gate-Insulator on Uniformity of Bottom-Gate ZnO Thin Film Transistors," Electrochemical and Solid-State Letters, vol. 13, p. H101, 2010.
[19] C.-T. Tsai, T.-C. Chang, S.-C. Chen, I. Lo, S.-W. Tsao, M.-C. Hung, J.-J. Chang, C.-Y. Wu, and C.-Y. Huang, "Influence of positive bias stress on N[sub 2]O plasma improved InGaZnO thin film transistor," Applied Physics Letters, vol. 96, p. 242105, 2010.
[20] J. Zhang, X. F. Li, J. G. Lu, P. Wu, J. Huang, Q. Wang, B. Lu, Y. Z. Zhang, B. H. Zhao, and Z. Z. Ye, "Evolution of electrical performance of ZnO-based thin-film transistors by low temperature annealing," AIP Advances, vol. 2, p. 022118, 2012.
[21] K. Nomura, T. Kamiya, H. Ohta, M. Hirano, and H. Hosono, "Defect passivation and homogenization of amorphous oxide thin-film transistor by wet O[sub 2] annealing," Applied Physics Letters, vol. 93, p. 192107, 2008.
[22]H. Q. Chiang, B. R. McFarlane, D. Hong, R. E. Presley, and J. F. Wager, "Processing effects on the stability of amorphous indium gallium zinc oxide thin-film transistors," Journal of Non-Crystalline Solids, vol. 354, pp. 2826-2830, 2008.

Chapter2

[1]T. Kamiya, K. Nomura, and H. Hosono, "Present status of amorphous In–Ga–Zn–O thin-film transistors," Science and Technology of Advanced Materials, vol. 11, p. 044305, 2010.
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[3]K. Hoshino, D. Hong, H. Q. Chiang, and J. F. Wager, "Constant-Voltage-Bias Stress Testing of a-IGZO Thin-Film Transistor," Transaction on Electron Devices, vol. 56, pp. 1365-1369, 2009.
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[5]C. C. Liu, M. L. Wu, K. C. Liu, S. H. Hsiao, Y. S. Chen, G. R. Lin, and J. Huang, "Transparent ZnO Thin-Film Transistor on Glass and Plastic Substrates Using Post-Sputtering Oxygen Passivation," Journal of Display Technology, vol. 5, pp. 192-197, 2009.
[6]P. F. Carcia, R. S. McLean, and M. H. Reilly, "High-performance ZnO thin-film transistors on gate dielectrics grown by atomic layer deposition," Applied Physics Letters, vol. 88, p. 123509, 2006.
[7]A. Suresh, P. Wellenius, A. Dhawan, and J. Muth, "Room temperature pulsed laser deposited indium gallium zinc oxide channel based transparent thin film transistors," Applied Physics Letters, vol. 90, p. 123512, 2007.
[8]M. Furuta, T. Nakanishi, M. Kimura, T. Hiramatsu, T. Matsuda, H. Furuta, T. Kawaharamura, C. Li, and T. Hirao, "Effect of Surface Treatment of Gate-Insulator on Uniformity of Bottom-Gate ZnO Thin Film Transistors," Electrochemical and Solid-State Letters, vol. 13, p. H101, 2010.
[9] T. Kawamura, H. Uchiyama, S. Saito, H. Wakana, T. Mine, M. Hatano, K. Torii, and T. Onai, “1.5-V Operating fully-depleted amorphous oxide thin film transistors achieved by 63-mV/dec subthreshold slope,” IEDM , pp. 77-80, Dec. 2008.
[10] Y. J. Chung, J. H. Kim, U. K. Kim, M. Ryu, S. Y. Lee, and C. S. Hwang, “Study on the Existence of Abnormal Hysteresis in Hf-In-Zn-O Thin Film Transistors under Illumination,” Electrochem. Solid-State Lett., vol. 14, no. 7, pp. H300-H302, May 2011
[11] H.-H. Hsieh, T. Kamiya, K. Nomura, H. Hosono, and C.-C. Wu, "Modeling of amorphous InGaZnO4 thin film transistors and their subgap density of states," Applied Physics Letters, vol. 92, p. 133503, 2008.
[12] L. Shao, K. Nomura, T. Kamiya, and H. Hosono, "Operation Characteristics of Thin-Film Transistors Using Very Thin Amorphous In–Ga–Zn–O Channels," Electrochemical and Solid-State Letters, vol. 14, p. H197, 2011.
[13] C. L. Chien and C. R. Westgate, "The Hall effect and its applications "New York : Plenum Press, 1980
[14]K. Nomura, T. Kamiya, H. Ohta, M. Hirano, and H. Hosono, "Defect passivation and homogenization of amorphous oxide thin-film transistor by wet O2 annealing," Applied Physics Letters, vol. 93, p. 192107, 2008.
[15] H. Q. Chiang, B. R. McFarlane, D. Hong, R. E. Presley, and J. F. Wager, "Processing effects on the stability of amorphous indium gallium zinc oxide thin-film transistors," Journal of Non-Crystalline Solids, vol. 354, pp. 2826-2830, 2008.

Chapter 3

[1] R. E. Presley et al., “Transparent ring oscillator based on indium gallium oxide thin-film transistors” Sol. Stat. Electron. 50, 500 (2006).
[2] M. Ofuji et al., “Fast thin-film transistor circuits based on amorphous oxide semiconductor,” IEEE Electron Device Lett., vol. 28, no. 4, pp. 273–275, 2007.
[3] H. Luo, P. Wellenius, L. Leda, and J. Muth, "Transparent IGZO-Based Logic Gates," Electron Device Letters, vol. 33, pp. 673-675, 2012.
[4] D. P. Heineck, B. R. McFarlane, and J. F. Wager, "Zinc Tin Oxide Thin-Film-Transistor Enhancement/Depletion Inverter," Electron Device Letters, vol. 30, pp. 514-516, 2009.
[5] K. Nomura, T. Kamiya, H. Ohta, M. Hirano, and H. Hosono, "Defect passivation and homogenization of amorphous oxide thin-film transistor by wet O2 annealing," Applied Physics Letters, vol. 93, p. 192107, 2008.
[6] H. Q. Chiang, B. R. McFarlane, D. Hong, R. E. Presley, and J. F. Wager, "Processing effects on the stability of amorphous indium gallium zinc oxide thin-film transistors," Journal of Non-Crystalline Solids, vol. 354, pp. 2826-2830, 2008.
[7] “Analysis and Design of Digital Integrated Circuits -in Deep Submicron Technology”, David A. Hodges
[8] “The Designer''s Guide to Jitter in Ring Oscillators”, John A. McNeill and David S. Ricketts
[9] “Fundamentals of Semiconductor Devices”, Richard Anderson


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