本論文係針對三款高速連接器進行模擬分析與量測驗證，其中包括USB3.0 Standard-A高速連接器、MicroUSB3.0 Micro-B高速連接器、以及QSFP 。USB3.0為通用序列匯流排之英文縮寫，是目前電腦配備的標準介面之一，其差模阻抗規範為75Ω至105Ω，上升時間為50ps(20%至80%)，資料傳輸速率為5Gb/s，並可向下相容USB2.0與USB1.0。QSFP為高密度四通道之英文縮寫，應用於交換器、路由器與雲端伺服器等設備上，其差模阻抗規範為90Ω至110Ω，上升時間為25ps(20%至80%)，及資料傳輸速率每組為10Gb/s。本論文應用電磁模擬軟體分析高速連接器之差模阻抗，藉由調整塑膠本體介電常數與端子結構之方法，以達規範標準之要求。此外，吾人設計屏蔽式共平面波導形式之治具板與治具卡，以實測連接器之差模阻抗、反射損失、饋入損失、串音干擾、傳遞延遲時間差與眼圖，而模擬與實測差模阻抗之趨勢大致相符。本論文所提出方法能應用於設計高速連接器，以減少模具開發的費用與時間。

This thesis proposes simulation/measurement analysis and design for three kinds of high speed connectors. The first design is about USB3.0 standard-A connector, and the second design is about MicroUSB3.0 micro-B connector. USB is universal serial bus which bringing convenience and practicality for computer. The differential mode impedance specifications are 75 ohm to 105 ohm. The rise times are 50 picoseconds between 20% and 80%, and the data rates are 5Gb/s. USB3.0 is forward compatible with USB1.0 and USB2.0. The third design is about QSFP connector. QSFP is quad small form-factor pluggable which is used for switches, routers and servers. The differential mode impedance specification is 90 ohm to 110 ohm. The rise time is 25 picoseconds between 20% and 80%, and the data rate is 10Gb/s. In this thesis, an electromagnetic solver software has been used to analyze the characteristic impedance of high speed connectors. We provide two manners to increase or decrease the dielectric constant of the insulator and adjust connector terminal size to match the connector specification. And the simulated result agrees with measured result. In addition, we used coplanar waveguide ground model to design the test card and test board, and used microwave net-word analyzer and digital serial analyzer to measure Return Loss, Insertion Loss, Crosstalk, Delay skew and Eye diagram. Eventually, we know that the thesis proposes the methods to design high speed connectors which can reduce the development times and costs of connectors.

摘要 I
ABSTRACT II
誌謝 III
目錄 IV
圖目錄 VI
表目錄 IX
第一章 緒論 1
1.1 前言 1
1.2 研究動機 2
1.3 章節概述 3
第二章 高速連接器概論 5
2.1 前言 5
2.2 特徵阻抗 5
2.3 差模訊號與共模訊號 7
2.3.1 差模訊號之特性阻抗 8
2.3.2 共模訊號之特性阻抗 10
2.4 頻寬與脈衝上升時間 11
2.5 時域反射儀之原理 13
2.6 串音干擾 16
2.7 眼圖之原理 18
2.8 連接器結構 20
2.9 結論 24
第三章 USB3.0高速連接器設計與分析 25
3.1 前言 25
3.2 USB3.0連接器規範介紹 25
3.3 USB3.0 Standard-A連接器與治具板架構 28
3.3.1 USB3.0 Standard-A連接器架構 28
3.3.2 USB3.0 Standard-A連接器之治具板架構 32
3.4 USB3.0高速連接器模擬分析 34
3.5 USB3.0高速連接器量測分析 37
3.5.1 時域反射(TDR)量測分析 37
3.5.2 饋入損失(Insertion Loss)量測分析 40
3.5.3 串音(Crosstalk)量測分析 41
3.5.4 差模與共模轉換量測分析 44
3.5.5 傳播延遲差異(Delay Skew)量測分析 45
3.6 結論 47
第四章 MicroUSB3.0高速連接器設計與分析 48
4.1 前言 48
4.2 MicroUSB3.0連接器規範介紹 48
4.3 MicroUSB3.0 Micro-B連接器與治具板架構 51
4.3.1 MicroUSB3.0 Micro-B連接器架構 51
4.3.2 MicroUSB3.0 Micro-B連接器之治具板架構 54
4.4 MicroUSB3.0高速連接器模擬分析 56
4.5 MicroUSB3.0高速連接器量測分析 58
4.5.1 時域反射(TDR)量測分析 59
4.5.2 饋入損失(Insertion Loss)量測分析 61
4.5.3 串音(Crosstalk)量測分析 62
4.5.4 傳播延遲差異(Delay Skew)量測分析 65
4.5.5 眼圖(Eye Diagram)量測分析 67
4.6 結論 72
第五章 QSFP高速連接器設計與分析 73
5.1 前言 73
5.2 QSFP高速連接器規範介紹 73
5.3 QSFP高速連接器、治具板與治具卡架構介紹 76
5.3.1 QSFP高速連接器架構 76
5.3.2 QSFP連接器之治具卡與治具板架構 79
5.4 QSFP高速連接器模擬分析 83
5.5 QSFP高速連接器量測分析 89
5.5.1 時域反射(TDR)量測分析 89
5.5.2 反射損失(Return Loss)與饋入損失(Insertion Loss)量測分析 93
5.5.3 串音(Crosstalk)量測分析 96
5.5.4 傳播延遲差異(Delay Skew)量測分析 99
5.5.5 眼圖(Eye Diagram)量測分析 103
5.6 結論 108
第六章 結論 109
參考文獻 110

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