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研究生:Altansukh Batsukh
研究生(外文):Altansukh Batsukh
論文名稱:CV Measurement Simulation of Power Device for Different Structure
論文名稱(外文):CV Measurement Simulation of Power Device for Different Structure
指導教授:楊紹明
指導教授(外文):Yang, Shao Ming
口試委員:楊紹明蔡宗叡何志宏
口試委員(外文):Yang, Shao MingTsai, Jung-RueyHo, Chi-hou
口試日期:2012-07-11
學位類別:碩士
校院名稱:亞洲大學
系所名稱:資訊工程學系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:39
中文關鍵詞:LOCOS LDMOSTAPERED LDMOSED-MOSMOSFET
外文關鍵詞:LOCOS LDMOSTAPERED LDMOSED-MOSMOSFET
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With the work reported in this manuscript we have essentially contributed to the electrical characterization and modelling of high voltage MOSFETs, more particularly LDMOS architectures such as LOCOS LDMOS, TAPERED LDMOS and ED-MOS able to sustain voltages ranging from 30V to 100V.
A highly scalable general high voltage MOSFET model, for the first time, is presented, which can be used for any high voltage MOSFET with extended drift region. This model includes physical effects like the quasi-saturation, impact-ionization and self-heating, Temperature Coefficient effect and a new general model for drift resistance.
Second, the compact modeling of lateral non-uniform doping is presented, which has great impact on the AC behavior.
Third, We combined for the first time effects on DC and AC characteristics of LDMOS transistors, with key emphasis on the degradation of transistor capacitances and the influence of the temperature. At our knowledge, our work reported in this work is among the first reports existing in this field.
We have essentially shown that the monitoring of capacitance degradation if mandatory for a deep understanding of the degradation mechanisms and, in conjunction with DC parameter degradation, could offer correct insights for reliability issues. Even more, we have shown situations by comparing three fundamental types of parameter degradation method.

With the work reported in this manuscript we have essentially contributed to the electrical characterization and modelling of high voltage MOSFETs, more particularly LDMOS architectures such as LOCOS LDMOS, TAPERED LDMOS and ED-MOS able to sustain voltages ranging from 30V to 100V.
A highly scalable general high voltage MOSFET model, for the first time, is presented, which can be used for any high voltage MOSFET with extended drift region. This model includes physical effects like the quasi-saturation, impact-ionization and self-heating, Temperature Coefficient effect and a new general model for drift resistance.
Second, the compact modeling of lateral non-uniform doping is presented, which has great impact on the AC behavior.
Third, We combined for the first time effects on DC and AC characteristics of LDMOS transistors, with key emphasis on the degradation of transistor capacitances and the influence of the temperature. At our knowledge, our work reported in this work is among the first reports existing in this field.
We have essentially shown that the monitoring of capacitance degradation if mandatory for a deep understanding of the degradation mechanisms and, in conjunction with DC parameter degradation, could offer correct insights for reliability issues. Even more, we have shown situations by comparing three fundamental types of parameter degradation method.

ACKNOWLEDGEMENTS ……………………………………………………… I-III
ABSTRACT……………………………………………………………………………IV
TABLE OF CONTENT …………………………………………………………..V-VI
FIGURES…………………………………………………………………………VII-VIII
CHAPTER 1. INTRODUCTION
1.1.Background………………………………………………….…...1-3
1.2. High Voltage MOSFET models………………………………… 3-4
1.3. Thesis Structure…………………………………………….…...4-5
1.4. LDMOS process simulation…………………….….…………….5-6
CHAPTER 2. DC BEHAVIORHIGH VOLTAGE MOSFET ARCHITECTURES…7-9
2.1. Drain-Extended MOSFET (DEMOS) …………………….… 9-10
2.2 . Locos Lateral double-Diffused MOSFET (LDMOS) ……….…10-11
2.3 . Tapered double-Diffused MOSFET (LDMOS) ………………..10-11
2.4 . Simulation result ………………………………….…………...10-11
2.4.1 Comparison study simulation breakdown off………………...10-11
2.4.2 Simulation breakdown on state………………………………..10-11
CHAPTER 3. DC BEHAVIOR OF HV-MOSFETS ………………………………12-13
3.1 Quasi-Saturation Effect …………………………………………12-13
3.2 Self-Heating Effect ……………………………………………...13-14
3.3 Impact Ionization Effect ……………………………………..….14-17
3.4 Temperature Coefficient effect…………………………………17-19
CHAPTER 4. AC BEHAVIOR OF HV-MOSFETS ………………………………20-22
4.1. Basic MOS capacitor structure and operation………….……….22-24
4.2 . Temperature Dependence of inversion-layer Frequency
Response in silicon…………………………………………..…22-24
4.3 . AC behavior of HV-MOSFETs ………………………………..24-25
4.4. Effect of Lateral Non-uniform doping ………………………..25-30
4.5. Effect of drift region………………………………………..…30-33
CHAPTER 5. CONCLUSION ……………………………………………………33-35
REFERENCES…………………………………………………………………33-35

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